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Analog/Custom Design: Virtuoso Video Diary: Technology File Maintenance Made Easy

Uma Peethambaran

The Virtuoso Techfile IDE offers a powerful and modern interface to easily create and modify ASCII technology files.
- 23 Oct 2019
Analog/Custom Design: Virtuoso IC6.1.8 ISR7 and ICADVM18.1 ISR7 Now Available

Virtuoso Release Team

The IC6.1.8 ISR7 and ICADVM18.1 ISR7 production releases are now available for download.
- 22 Oct 2019
System, PCB, & Package Design : IC Packagers: Manage Your Outside Data Sources in One Place

Tyler

Every package design has data sources. Die data you receive from the IC design team as they send you updated die text files and co-design die abstracts. Your downstream PCB design team may send an updated ball map spreadsheet with change requests. Obviously, your front-end schematic engineer will be pushing you updated netlist information. How do you keep track of when the last time was that you imported data from a…
- 22 Oct 2019
Breakfast Bytes: Arm TechCon: A Look at 2020 and 2030

Paul McLellan

The last day of Arm TechCon opened with the return to the event of Charlie Miller. I already covered that in my post Charlie Miller: Stopping Cars Being Hacked Instead of Hacking Them. For my first post about Arm TechCon this year, see my post Arm Te...
- 22 Oct 2019
Analog/Custom Design: Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part II

Kabir

This is the second blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. For some useful guidelines on selecting geometries for electromagnetic analysis, read
- 21 Oct 2019
Breakfast Bytes: EDPS 2019: Efficient Design and Manufacturing

Paul McLellan

EDPS, the Electronic Design Process Symposium, took place on October 3 and 4 at SEMI HQ in Milpitas. The theme was Efficient Design and Manufacturing. Camille Kokozaki The meeting opened with a moment of silence for Camille Kokozaki, who had helped ...
- 21 Oct 2019
PCB、IC封装：设计与仿真分析: 如何创建最佳PCB叠层

TeamAllegro

当进行装修时，我们会发现选择材料时最好要咨询专家或者有经验的人。举例来说，也许装修类杂志推荐了一种非常昂贵的屋顶材料，但是当我们到当地的家装店询问后，发现当地的气候根本不需要这种极其耐用坚固的材料，普通材料即可满足我们的需求。在电路板设计上创建PCB叠层也会遇到类似情况：我们可能不了解最适宜的PCB材料，也不知道如何有效地构建叠层。在作出决定之前，清楚了解我们的需求才能对设计最为有利。优化设计意味着梳理可供考虑和选择的众多变量。本文将讨论如何确定哪些PCB叠层信息需要了解的方式方法。 01....
- 18 Oct 2019
定制IC芯片设计 : Spectre 技术小窍门：器件老化？是的，即使是硅也会失效

Meilin Zhang

作者：Moustafa Moham 虽然我们大多数人都希望我们的电子产品永远工作，但事实是这些产品有生命周期。大多数情况下，器件的寿命受到机械（开关，继电器）或热（熔断器，电容器）故障的限制。然而，随着先进工艺设计的微芯片变得越来越常见，微芯片的寿命成为另一个问题。几种效应会导致器件老化。某些影响，如电迁移和Time-Dependent Dielectric Breakdown (TDDB)会导致突然故障，而其他影响，如Hot Carrier injection (HCI)和Bias Temp...
- 18 Oct 2019
定制IC芯片设计 : Spectre 技术小窍门：如何使用 Spectre APS 在 ADE 中执行 EMIR 分析？

Meilin Zhang

作者：Stefan Wuensche Spectre 技术小窍门是一个博客系列，旨在探索 Spectre® 的功能和潜力。除了深入了解 Spectre 的有用功能和优化改进之外，本系列还传播不同博主和专家的声音，他们将分享他们在与Spectre 相关的所有事情上的知识和经验。本系列的第一篇博客将指导您完成使用 Spectre APS 在 ADE 中执行 EMIR 分析所需的步骤。作为模拟或混合信号设计人员，您将在Virtuoso® Analog Design Environme...
- 18 Oct 2019
Breakfast Bytes: Book: VLSI Design Methodology Development

Paul McLellan

There are lots of books on EDA, but many of them are academic texts about the algorithms used inside EDA tools. Rather fewer of them are written for people doing real designs. A recently published book firmly targeted at the practical needs of ...
- 18 Oct 2019
Analog/Custom Design: Virtuosity Webinar: Achieving Layout Success with Custom Design Planner and Design Intent - October 29, 2019

sarahfino

Enhance productivity with Design Planner and Design Intent. Attend our FREE one-hour webinar with Baby Ravi and Bill Cambouris on Tuesday, 29 October 2019.
- 18 Oct 2019
SoC and IP: Did You “Stress Test” Yet? Essential Step to Ensure a Quality PCIe 4.0 Product

William Chen

The PCI-SIG finalized the PCIe 4.0 specification with doubling the data to 16GT/s from 8GT/s in PCIe 3.0 in 2017. Products implementing this technology have begun to hit the market in 2019. Earlier this year, AMD announced it X570 chipset would support the PCIe 4.0 interface and Phison also introduced the world’s first PCIe 4.0 SSD. With the increasing companies are working on PCIe 4.0 related product development…
- 17 Oct 2019
Breakfast Bytes: Samsung: In SAFE Hands

Paul McLellan

Today is Samsung's SAFE Forum 2019 at their Samsung@First building on San Jose's First Street. SAFE stands for Samsung Advanced Foundry Ecosystem. Since Samsung Foundry really only has two events per year, the other being the Samsung F...
- 17 Oct 2019
Life at Cadence: Taking the Trip of a Lifetime

TramN

This year, I was excited to be one of 10 Cadence employees selected from 130 applicants to participate in the company’s first international volunteer service immersion program with the nonprofit Team4Tech. The team was brought together to work ...
- 16 Oct 2019
Breakfast Bytes: Charlie Miller: Stopping Cars Being Hacked Instead of Hacking Them

Paul McLellan

The last day of Arm TechCon opened with Charlie Miller talking about Experiences with and Views on the Future of Driverless Cars Technology. Charlie has appeared in Breakfast Bytes before in Automotive Security: A Hacker's Eye View. He, alon...
- 16 Oct 2019
Analog/Custom Design: Virtuoso Video Diary: Record. Replay. Relax.

Pallabi R

Want to record your work and replay it later? Want to automate things and save time? Then start using the "Record and Replay Files" available in Virtuoso Abstract Generator.
- 16 Oct 2019
Whiteboard Wednesdays: Whiteboard Wednesdays – Verification with Emerging Memory Models

References4U

In this week's Whiteboard Wednesdays video, David Peña discusses Cadence’s focus on models for various emerging memory standards.

https://youtu.be/_Xps6I6kE0E
- 15 Oct 2019
SoC and IP: PCIe 3.0 Still Shines While PCIe Keeps Evolving

William Chen

PCIe has been widely adopted in the electronics industry since its first debut in 2003 (PCIe 1.0 standard release) for wide breach of applications, from Data Center Server, Networking, to Mobile, AI/ML, Automotive, IoT, and many others…. It’s a versatile, high-performance, robust, mature interconnect standard with full “backward compatibility” (e.g., a PCIe 3.0 device can still function well in a PCIe 4.0 system) which…
- 15 Oct 2019
System, PCB, & Package Design : IC Packagers: Optimize Display Settings for Faster Screen Redraws

Tyler

While designing interposers and very high pin count device packages, as the number of objects to manipulate increases, you may notice that the display takes longer to draw. This is for a very good reason: by default, the tools will draw everything.....
- 15 Oct 2019
Breakfast Bytes: Machine Learning in JasperGold

Paul McLellan

When I was in Tel Aviv for CDNLive Israel, I sat down with Ziyad Hanna to discuss what Cadence calls "Smart Formal Technologies". This is using deep learning techniques to improve formal verification with the JasperGold Formal Verification ...
- 15 Oct 2019
System, PCB, & Package Design : DATA Pulse: Collaborate and Combine Forces – Allegro EDM Team Design

Auromala

Working in an ECAD design team? Want to control access to certain design elements? Would notifications of design changes by other team members be helpful? If yes…
- 14 Oct 2019
Breakfast Bytes: Arm TechCon: The Keynotes

Paul McLellan

Simon Segars opened Arm TechCon with a new look, having discovered that real men have beards. This is the 15th Arm TechCon. In this post I'm going to focus on the new things that Arm announced during the keynotes. Simon Segars Back when TechCon s...
- 14 Oct 2019
定制IC芯片设计 : Virtuosity：Modgen简介

Aneesh Shastry

半导体行业的飞速发展导致对模拟版图自动化的需求不断增长。模拟电路通常使用current mirrors和 differential pairs的结构，其中器件特性的分组和匹配至关重要。 Virtuoso通过提供高端工具来解决这些挑战，这些工具可确保在设计目标上更快地融合并实现高效的版图实现。在此博客中，我将向您概述这样一种工具-Virtuoso Module Generator，俗称Modgen。
- 13 Oct 2019
Breakfast Bytes: Sunday Brunch Video for 13th October 2019

Paul McLellan

https://youtu.be/8BM28qwHyUk Made at Arm TechCon (camera Randy Smith) Monday: What Is Quantum Supremacy? Tuesday: It's Ada Lovelace Day Today Wednesday: The First Woman to Receive the Kaufman Award Thursday: The Economist on RISC-V and ...
- 13 Oct 2019
PCB、IC封装：设计与仿真分析: 5G系统的PCB材料和设计要求

SDA China

即将到来的5G时代迫使设计师对于移动设备和物联网设备的PCB设计进行着重新思考。这些5G系统将使大多数消费者的设备运行速率达到新高度。当我们对电路板提出通信要求时，还需要考虑许多其他关键因素。 5G系统要求预计到2021年，将有30亿台移动设备和物联网设备上线。随着这些设备的上线，5G系统的目标是（相比4G）：数据速率提高10-20倍（高达1 Gbps）、流量增加1000倍和每平方公里的连接增加10倍。5G还计划将延迟降至1毫秒，比4G网络快10倍。相比4G和3G，5G无线网络的运行频率...
- 11 Oct 2019

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