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Cadence's multiphysics system analysis (MSA) portfolio grew in both depth and breadth throughout 2024. Across electromagnetics (EM), signal and power integrity (SI/PI), thermal and electronics cooling, computational fluid dynamics (CFD), and data center digital twinning, we offer in-design analysis (IDA) solutions that streamline workflows by integrating multiphysics analyses directly into design platforms for electronic…

We are witnessing a dramatic rise in disaggregation and a lot of discussion around chiplet-based design. There are multiple reasons for it: as monolithic dies grow larger, they hit reticle limits and much before that the yield drops precipitously making them uneconomical. That is where monolithic designs are headed and to stay economical, they need to disaggregate into chiplets. This is not the only reason. Cost per transistor…

Thermal challenges in 3D-IC designs can cause a significant risk in meeting performance specifications. While the pace of Moore’s Law has slowed in recent years, system technology co-optimization (STCO) promises to mitigate technology scaling bottlenecks with system architecture tuning based on emerging technology offerings, including 3D technology.

AI-driven inference accelerators continue to expand the 2D system…

Verisium WaveMiner is part of the Verisium suite of AI-driven verification tools that automate the root cause analysis of misbehavior introduced between two versions of the same RTL design. By analyzing passing and failing waveforms, Verisium WaveMiner ranks and highlights the signals and timepoints relevant to the misbehavior, simplifying the regression debug process.

In the rapidly evolving field of photonics, designing and optimizing photonic integrated circuits (PICs) is crucial for advancing technology. As the demand for high-speed data transmission and optical communication continues to grow, the need for efficient and accurate photonic design tools has become increasingly important. Cadence's Virtuoso Layout for photonics design is a powerful tool that enables designers to create…

Please join Aires Manuel Terra, Lead Application Engineer for this free technical Training Webinar.

In this webinar, we’ll show you how to keep up with ever-changing layout requirements and challenges. We’ll also demonstrate Virtuoso Layout Suite capabilities that boost layout designer productivity in Virtuoso Studio, such as:

• Creating optimal floorplans that combine top-down and bottom-up methodologies…

Have you ever wondered how mission-critical systems in automotive, medical, aerospace, defense, and communications maintain their reliability even under extreme conditions? Consider the automotive industry, where electronic components must function reliably in the high-temperature environment under a vehicle's hood. By simulating these conditions, designers can validate the operation of over-temperature protection circuits…

The automotive world is experiencing a groundbreaking transformation, with technology and AI-driven innovation at its core. Among the most significant advancements is the rise of physical AI, a concept that is redefining the industry from the ground up. Physical AI goes beyond traditional artificial intelligence by enabling autonomous systems to seamlessly perceive, understand, and interact with the physical world. For…

Have you ever found yourself in an Italian restaurant, twirling your fork around a plate of delicious spaghetti? Good spaghetti is a true gift, but spaghetti code? Not so much.

Spaghetti code refers to complex, tangled programming code that is a nightmare to follow and maintain. We've all been there when we have inherited code from someone who has moved on, and it's now our job to maintain it or debug it in a crisis.…

Are you tired of manually extracting pins, analyzing connectivity, modeling blockages, creating sites, and calculating overlap in your complex design?

In the complex world of chip design, extracting critical information from detailed layouts can be difficult. To overcome these challenges, many designers are turning to innovative solutions like abstract generation. By converting detailed layout information into high-level…

Cadence and Wild River Technology (WRT), a leading supplier of signal integrity measurement and optimization test fixtures for high-speed channels at data rates of up to 224G, collaborated on a compelling presentation at DesignCon 2025 describing how understanding anisotropic materials and tolerances could result in "free signal integrity" by increasing electronic product performance at 112/224Gbps and beyond. The paper…