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For nearly all applications, customers continue to demand smaller, lighter, and more cost-effective products. Competitive pressures also force designers to bring these new products to market at an ever-increasing rate. Designers can deploy flexible PCB materials (flex/rigid-flex) to meet challenging form-factor requirements, eliminate connectors, and improve performance.

It might seem a bit premature to be talking about IEDM since it isn't until December. But the deadline for submissions has been extended this year to August 10 (so still just a couple of weeks away). Why? As this year's publicity chair, Martin Giles,...

Today at the Linley Mobile and Wearables Conference in Santa Clara, Cadence is announcing the latest Tensilica DSP. The Tensilica^® Fusion G3 is a multi-purpose low-power DSP targeted at mobile and other markets. Usually when we design a new processor...

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In this week's Whiteboard Wednesdays video, Paul Garden provides an introduction to the new Tensilica Fusion G3 DSP for automotive, mobile, industrial, and general embedded DSP applications. He’ll discuss the main features of the Fusion G3 DSP, highlight some of the target applications, and provide a quick overview of some of the key software deliverables. The Fusion G3 is a multi-purpose fixed- and floating-point DSP…

One of the most interesting sessions that I attended at SEMICON West the week before last was titled Pathfinding Beyond 5nm. This was moderated by David Hemker, the CTO of Lam Research.

An Steegen, imec

The first speaker was An Steegen of imec. She...

CDNLive India is coming up on August 9th and 10th in Bengaluru. I will be there and so Breakfast Bytes will be covering some of what goes on there. It is not my first trip to India or even to Bengaluru (although it was still called Bangalore back then...

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Product Manuals
You can access product manuals for all the supported releases. Have you checked out Sigrity 2016 documents yet? If not, click here ……

PSpice.com is a new user-community web portal that lets designers, partners, and students access materials related to PSpice® analog and mixed-signal simulation and analysis in one central location.

“The PSpice web portal and community is a good resource for any analog or mixed-signal engineer creating an electronic design,” said Makram Mansour, Ph.D., WEBENCH Manager at Texas Instruments. “Within the www.PSpice…

With DAC and other events during May and June, I am only now wrapping up stuff I wanted to write about from EDPS in Monterey. Cadence's T.C.Lin presented about the importance of system-level power and ended up with a recipe of how to do it.

I won...

The Allegro 17.2-2016 release, the largest in the past 10 years, became available in late April 2016. Since 17.2-2016 includes a database change that usually happens with a dot zero release, many of you may be wondering when the right time to migrate to this new release is.

Included below is an overview of the Top 10 reasons to move up to the Allegro 17.2-2016 release, so that you can better understand the value of each…

Modern fabs use 300mm (12") wafers. Older fabs have used 200mm (8") wafers since the early '90s, starting with IBM Fishkill's pilot with Siemens to build 64Mb DRAM in 1990. Before that, we had 5" wafers (150mm), and if you go back far enough in history...

Growing deployment level of 10 Gigabit Ethernet in datacenters and automotive infotainment is driving the demand and the connectivity needs of a broad range of high-end, energy-efficient networking and computing applications.

Energy-efficient networking in server area basically means elimination of packet loss, server virtualization with support for several applications and operating systems on a server; all by defining…

My docking station with the rat’s nest of wires dangling from behind it could be going the way of the Dodo bird soon, thanks to USB Power Delivery (PD) protocols and USB Type-C connectors.

The traditional docking station that we all know and hate, typically looks something like the picture below.

This is a photo of my docking station at work. These docking stations have 3 main problems:

1. There is a mess of…

With the 16.6-2015 Allegro PCB Editor release, the Snake pattern router can be enabled from the context menu of the Add Connect command. This functionality provides the ability to route through hex pattern packages utilizing arc routing, which has been greatly improved compared to the existing prototype pattern generator. Simply enable Snake mode via the RMB and Add Connect will detect a hex pattern pin/via field and…

The Monday before SEMICON West starts, there are two events that run in parallel in the Marriott Hotel. One is imec's US technology forum. Since I already attended the two-day version in Brussels, and wrote about it over the last couple of months, I attended...

Cadence was awarded with the IEEE Donald O. Pederson Best Paper Award—EDA’s most prestigious recognition of its kind—for the best paper published in IEEE Transactions on CAD over the past two years. 

The paper, “Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma Sampling for High-Dimensional Variation Space”, was part of a collaboration with Carnegie Mellon University.…

In this week's Whiteboard Wednesdays video, Samer Hijazi discusses bringing deep learning to embedded devices.

https://youtu.be/1bi9Cg0tp6o

This year's Linley Mobile and Wearables Conference is coming up next week on July 26 and 27 in the Hyatt in Santa Clara. I'm sure Linley Gwenap is furiously rewriting his keynote on the mobile industry in the light of Softbank's acquisition of ARM, announced...

PCI-SIG Developers Conference 2016 is now history, taking place at the Santa Clara Convention Center at 28^th-29^th June, once again proving it’s not an event you want to miss. With PCIe 4.0 standard maturing, we’re seeing a lot of action in the market, though there are questions that have to be answered. 

There were questions about PCIe 5.0, and though it will become an important project, the SIG wisely is…

Over the weekend it seems that Softbank has closed a deal to acquire ARM Holdings (what we in the industry simply think of as ARM) for an all-cash deal for around $32B. The deal is expected to be formally announced on Monday, but since the Wall Street...

Chris Rowen, the CTO of the Cadence IP group, wrapped up the recent seminar in Las Vegas (see Breakfast Bytes for the last three days) by giving a vision for the future of neural networks and deep learning.

The technology is advancing fast but there...

The winners of the Tensilica Xtensa Embedded DSP Design Contest have been announced! The winning team members from CMR Institute of Technology, Bengaluru and Bangladesh University of Engineering and Technology, Dhaka received a HTC Desire 620G mobile...

The German Traffic Sign Benchmark actually has the signs divided into groups: speed limits, danger signs, and so on. It turns out that humans make far fewer errors between groups than within groups. They might mistake a 30kph speed limit sign for an 80kph...