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Functional Coverage is one of the main means to measure the quality and progress of the verification project. We define coverage models, run semi-random tests, and every once in a while analyze the coverage report to decide “are we there yet?”.

When talking about “coverage closure”, people tend to talk about generation, how we create the data that will fill the coverage. In this blog, we discuss the definition…

Poland is a country with long tradition in microelectronics education and research. During the time of Iron Curtain when the universities were controlled by the government, the AGH University in Cracow was responsible for building microelectronic circuits...

Cadence Academic Network is supporting for years PRIME (PhD Research in Microelectronics and Electronics) and SMACD (Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design) conferences, so we were quite happy that both...

Convolutional neural nets (CNNs) are not programmed in the traditional sense, but rather they are trained. The challenge to doing this is that you need a lot of good data which is already classified as the training material.

The process is not that different...

My team recently had the privilege of hosting first year undergraduate students aka soon-to-be brilliant engineers from Pohang University of Science and Technology (POSTECH), Korea. On June 27 at 10 AM, a group of 35 engineering students and two professors...

Hope you read my previous blog on Cadence Academic Network sponsoring all the student activities and sponsorships at DAC this year. More than 100 students from around the world received the travel grants (sponsorships) and travelled to DAC Austin this...

In this week's Whiteboard Wednesdays video, Chung Huang summarizes his presentation from CDNLive Silicon Valley on gauging quality of signals using the eye diagram. To view his CDNLive presentation, please go to: https://www.cadence.com/cdnlive/na/2016/Pages/proceedingssummary.aspx. Refer to session DES204: Complexities in Developing a High-Performance DDR Subsystem at 3200Mbps on 16FF+.

https://youtu.be/kfCReND…

Neural networks are hot. Las Vegas is hot, too. And there is a connection. In late June, one of the major conferences for the field, Computer Vision and Pattern Recognition (CVPR), is held there. On the Sunday before, Cadence ran a half-day training course...

This doesn’t have much to do with Cadence or semiconductors. It has a lot to do with Japan, but Japan isn’t the force it used to be in semiconductors. They have gradually rolled a lot of their semiconductor companies up into Renasas, and their DRAM operations...

Cadence and ARM have created an IoT IP reference sub-system that can speed system development, enabling rapid prototyping and reducing time to market. The sub-system contains a processor and a set of peripherals that are typical for IoT sensors, giving a design team access to required functionality. Thus, the engineering effort is spent configuring the system, connecting the data stream to the cloud, and developing the…

In this week's Whiteboard Wednesdays video, Chris Rowen discusses optimizing neural networks for low-energy and high-throughput applications.

https://youtu.be/AY2944-dyr8

This year’s CDNLive Silicon Valley developer conference had more than 125 presentations from 12 different technical tracks. More than 25 exhibitors participated in the Designer Expo.

The IC Packaging/Signal Integrity/Power Integrity track featured customer papers on co-design as well as signal, power, and thermal integrity. With the challenge of creating final products as quickly and as efficiently as possible…

Pieter Vorenkamp is the new(ish) senior VP and general manager of the semiconductor IP group here at Cadence. With both of us traveling a lot last month, it took about a dozen attempts to find a slot when we could talk, but the only slot was on my way...

If you were asked where in the world the most leading-edge semiconductor research is done, you'd probably pick the US or perhaps Taiwan. But the real answer is Belgium. Not even Brussels, but Leuven, a small town about 15 miles to the east where imec...

At the recent GSA silicon summit, there was a panel session on designing for the cloud. The panel was moderated by Linley Gewennap of the Linley Group. The panelists were Ivo Bolsoens, the CTO of Xilinx, Ian Ferguson from ARM, and Stephen Pawlowski of...

In this week's Whiteboard Wednesdays video, Arif Kahn details the evolution of the USB interface from USB 1.0 to today's latest USB Type-C interface.

https://youtu.be/x4RFNG1vdWs

It is hard to attend any sort of meeting to do with semiconductors without hearing about the Internet of Things (IoT), and probably the hottest subtopic is IoT security. Some devices will contain our health data, some are dangerous. Even the apocryphal...

This month, we celebrate the 20^th anniversary of Specman’s introduction to the public—at DAC 1996 in Las Vegas. This introduction was not simply of a new tool—it was the introduction of a new concept. Specman included e, and thus, with that introduction, the first Hardware Verification Language was born.

Many of you, I suspect, were still in high school in the 1990s. You would be amazed if you saw some…

IEEE European Test Symposium (ETS) is the largest event in Europe committed to presenting and discussing scientific trends, emerging results, hot topics and applications in the area of electronic-based circuits and system testing. ETS’16 which took place...

Back in May, Professor Gilles Jacquemod and 9  engineering students from Tianjin University who are currently visiting Sophia-Antipolis engineering school stopped by the Cadence office in Sophia, France.The students have been selected to participate in...

One of the keynotes at the imec technology forum last month was by Gary Patton, the CTO of GLOBALFOUNDRIES. I reminded him in the evening event at the Magritte museum that he'd done an interview with me last year that had gone viral inside GLOBALFOUNDRIES...

Neural networks have become very popular today due to their use in leading-edge technology like deep learning machines, artificial intelligence, and virtual reality. Neural networks offer a powerful way to extract meaning in recognizing objects and actions within a visual stream. It's a topic with a lot of buzz today, and as the use of it becomes more and more pervasive, it’s just a matter of time before the devices we…

PCI-SIG is a leading event in cloud infrastructure transformation, which is markets all over the world. We see a lot of market forces at work, creating urgency for PCIe Gen4 dynamics. Designers, system architects, engineers and engineering managers will be the driving force behind another PCI-SIG event. Taking place on June 28-29 2016 at the Santa Clara Convention Center, California, this prestigious event is filled with…

CDNLive EMEA is often cited as the most exciting event of the year for Cadence. This being the first time I would be attending any CDNLive, I was eager to see for myself if this was true and I must say in retrospect, that all my expectations were met...

I was in Brussels a couple of weeks ago to attend imec's annual technology forum. One of the keynotes on the first morning was from Wally Rhines, Mentor's CEO, entitled Extending Semiconductor Cost Reduction Another 20 Years. As Gordon Moore himself...