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Latest Blog Posts

  • SoC and IP: Numonyx 128-Mbit serial- and parallel-I/O PCM non-volatile memories now available in volume

    archive
    archive
    Numonyx has announced or reannounced two 128-Mbit non-volatilve memory devices based on the company’s 90nm PCM (phase change memory) process technology. These two devices target existing NOR Flash memory sockets and the company’s press release claims that both products are available now in production quantities. The two announced PCM memory devices are the Omneo P8P PCM parallel-I/O memory and the Omneo P5Q PCM serial…
    • 22 Apr 2010
  • System, PCB, & Package Design : What's Good About Simplifying the Use of Third-Party SI Models? It's in SPB16.3!

    Jerry GenPart
    Jerry GenPart

    Today, many users receive SI models that are not in DML format. They are given IBIS models, HSpice models, Spectre models as well as other generic SPICE models. We currently provide methods for translating these model formats into DML, but it's often not straightforward. It usually requires running a batch command with options that are not familiar to the non-expert user.

    This translation process has been simplified…

    • 21 Apr 2010
  • Verification: UVM Based on OVM 2.1.1: What a Great Idea!

    tomacadence
    tomacadence

    Regular readers know that I have been urging the Accellera VIP TSC to base its Universal Verification Methodology (UVM) on the OVM 2.1 release rather than on OVM 2.0.3 as voted back in December. A few readers took me to task for my shameless advocacy, suggesting that I shut up and "let the committee do its job" in a technical world unsullied by Marketing considerations. In response, I argued that successful standards…

    • 21 Apr 2010
  • Verification: When Less Is More, Part 3: Is e code really “infinitely” more compact than SystemVerilog?

    teamspecman
    teamspecman

    Building on the packet generation example of part 1, and the coverage examples of part 2 that compare the ratio of lines e code to lines of SystemVerilog for a given task, in this post I’m going to show you how to “divide by 0” and leverage e capabilities that simply don’t exist in SystemVerilog, technically making e infinitely more capable (pardon the pun – couldn’t resist).

    From the beginning, the e language was designed…

    • 21 Apr 2010
  • SoC and IP: Intel’s Atom-based Tunnel Creek SOC with integrated PCIe interface opens new era for embedded developers

    Denali Blog
    Denali Blog
    One of the most ignored Intel announcements of recent memory must be Doug Davis’ early disclosure at IDF (China) on April 14 (see the hour-long keynote video here) of the company’s new Atom-based Tunnel Creek, an SOC specifically designed for embedded applications. Intel’s Atom processor, a relatively low-powered implementation of the “Intel Architecture,” has been taking the low-end notebook and netbook world by storm…
    • 19 Apr 2010
  • SoC and IP: Network World SSD Smackdown shows Fusionio’s PCIe-based SSD provides highest throughput

    archive
    archive
    Network World has just posted an SSD comparison test written by Logan G. Harbaugh. The test pitted some consumer-class SSDs against enterprise-class SSDs and with an Adaptec ASR5805/512 SSD controller and MaxIQ kit, which uses an attached SSD to accelerate attached drives arrays via flash caching. Overall, Harbaugh found that the SSDs improved system performance by a factor of 2 to 10 depending on the product.

    The…
    • 19 Apr 2010
  • SoC and IP: Firmware as the performance differentiator for SSD controllers

    archive
    archive
    Anandtech has just posted a meaty article about SandForce SSD controllers as used in SSDs from OCZ and Corsair. (Understanding SandForce's SF-1200 & SF-1500, Not All Drives are Equal) It’s worth a read from at least two perspectives. First, it gives you some pretty deep insight into the real importance and value of the firmware running on these SSD controllers. As the Anandtech article discusses, controller firmware…
    • 16 Apr 2010
  • Digital Design: EDP Symposium Uncovers an Inconvenient Truth with a Shot of 3D

    RahulD
    RahulD
    Every April the leading edge of the leading edge of semiconductor industry meet at the Electronic Design Process (EDP) Symposium to address design problems that make design more difficult than it should be. This was my first visit and chance to rub shoulders with the industry's gurus and to discuss the arc and future of EDA tools and the EDA industry.

    The nice thing about the EDP symposium (often referred…

    • 16 Apr 2010
  • SoC and IP: Comprehensive SSD eval puts four drives to the test

    archive
    archive
    Geoff Gasior at The Tech Report has just published a long and very comprehensive side-by-side comparison of four SSDs from Corsair, Kingston, Plextor, and Western Digital. He’s pulled the covers off the drives to look at the guts (and he names names of the on-board controller chips in the process) and Gasior then tests each drive in turn to come up with some really interesting comparisons. If you’re interested in how…
    • 15 Apr 2010
  • SoC and IP: Micron using ONFI 2.1 and SATA 3.0 to leapfrog Enterprise SSDs over HDD performance

    archive
    archive
    PCWorld reports that Micron will soon be rolling out Enterprise-class SSDs based on 34nm, ONFI 2.1, SLC (single-level cell) NAND Flash devices. These drives will employ the 6-Gbit/sec SATA 3.0 interface specification to create an I/O channel with enough bandwidth to support the faster Flash. Doing so makes the soon-to-be-introduced RealSSD P300 SSDs more than competitive with 10,000- and 15,000-rpm Enterprise-class HDDs…
    • 15 Apr 2010
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor Groups? Look to SPB16.3 and See!

    Jerry GenPart
    Jerry GenPart
    With the Allegro PCB Editor SPB16.3 release, you can now allow groups to have elements added or removed.

    The construction and disbandment of groups is now supported in both the General and Placement application modes. Groups are easily created in the working canvas by first pre-selecting multiple elements followed by the selection of the "Add to Group" command located in the context sensitive right mouse button "Add to…
    • 14 Apr 2010
  • Verification: Specman-SimVision webinar on April 22 (next week!)

    teamspecman
    teamspecman

    We interrupt Corey's excellent "When Less Is More" series to announce a Specman-SimVision webinar next week, April 22 at 10:00AM Pacific time.  In short, if you’ve been using Specview with Specman/e and would like to learn all the key advantages of using the SimVision debug tool, this webinar is for you!

    Date:  April 22nd, 2010
    Time:  10:00am PDT / 1:00pm EDT
    Duration:  60 minutes

    Sign Up Today! http://www…

    • 13 Apr 2010
  • SoC and IP: Eurocom’s D900F Panther Notebook with 6-core Intel i7-980X processor: the shape of things to come for memory consumption

    archive
    archive
    With all the talk of DRAM growth in 2010, you might wonder what’s driving the consumption. It’s a very logical question. Sometimes, growth is simply driven by existing market momentum. Sometimes, it’s driven by a new product category such as Apple’s iPad, discussed earlier. And sometimes, there are disruptive changes in existing markets that also drive new waves of consumption. This blog entry is about one of those changes…
    • 13 Apr 2010
  • SoC and IP: More signs of spring for the 2010 DRAM market

    archive
    archive
    Earlier, we reported on the appearance of several good economic signs springing up for the DRAM market. Here are a few more:

    Late last month, EDN’s Ann Steffora Mutschler reported on Semico’s 1Q 2010 forecast calling for greater than 70% growth in DRAM sales this year. That’s on the heels of Q3 and Q4 2009 DRAM growth rates reported at 33% and 44% respectively (although it’s after a huge drop in 2008). Semico concludes…
    • 13 Apr 2010
  • Verification: Hate Writing Assertions? No problem: let Automatic Formal Analysis do the work

    TeamVerify
    TeamVerify

    OR: “Leverage automatic checks extracted from designs without writing a single assertion”

     

    What if a push button solution existed that ran a set of assertion checks on a design but did not require a single assertion to be written?  Would you use it?  Of course you would.  However, many people believe that in order to benefit from Incisive Formal Verifier (IFV) or Incisive Enterprise Verifier (IEV) you need to know…

    • 12 Apr 2010
  • Verification: New Blog: All About Integrated formal, Simulation, and Assertion-Based Verification Technologies & Methodologies

    TeamVerify
    TeamVerify
    End-users of Incisive Formal Verifier ("IFV"), Incisive Enterprise Verifier ("IEV"), or anyone interested in either "pure formal" verification, integrated formal analysis and simulation verification, and assertion-based verification (“ABV”) in general: have we got the blog for you!

    Today "Team Verify" is proud to roll out this new blog covering:

    • Detailed tips, tricks, and power tools…
    • 11 Apr 2010
  • SoC and IP: Apple iPad: no LPDDR2?

    Denali Blog
    Denali Blog
    Guest Blogger: Marc Greenberg, Technical Marketing Director

    By now it seems that anyone with an engineering degree has probably read 2 or 3 teardown reports on Apple’s iPad. Few that I have seen so far talk about the DRAM memory subsystem -- and that could be because the DRAM was hidden on top of Apple’s A4 processor.

    Chipworks.com has torn down Apple’s A4 processor package and reports that the DRAM subsystem consists…
    • 9 Apr 2010
  • SoC and IP: Good times for DDR2 and DDR3 DRAM: Think Memcon 2010

    archive
    archive
    Several more bits of good DRAM news today appearing in DigiTimes and elsewhere point to the improving market for DRAMs. First, Scott Chen, vice president of the APAC Business Division of DRAM module maker Kingston Technology says that he sees signs of strong demand for DRAMs throughout this year. One of the reasons for this rosy outlook is the memory demand created by Microsoft Windows 7 purchases and upgrades. The incremental…
    • 8 Apr 2010
  • System, PCB, & Package Design : What's Good About Windows 7? You'll Need SPB16.3 To See!

    Jerry GenPart
    Jerry GenPart

    OK, OK - I'm sure you don't "need" SPB16.3 to see all the cool whiz-bang features in Windows 7. But, you can now run the SPB16.3 (and very soon the ADW16.3) release on Windows 7.

    You can always visit the Cadence Online Support Cadence Support News area for the latest information about releases, platforms, CDNLive information, etc. The official Windows 7 announcement for the SPB16.3 release can be found…

    • 7 Apr 2010
  • SoC and IP: OCZ Technology unleashes 4th-generation PCIe-based SSD: 512Gbytes to 2Tbytes

    archive
    archive
    Yesterday, high-performance PC component developer and vendor OCZ Technology rolled out its 4th generation of PCIe-based SSD drives called the Z-drive R2 SSD. The new drives employ NAND Flash memory DIMMS arrayed on a standard PCIe-format add-in card. The cards employ x8 (8-lane) PCIe interfaces to achieve a rated read speed of as much as 1.3Gbytes/sec for the 512Gbyte SSD board and 1.4Gbytes/sec for the 1Gbyte and 2Gbyte…
    • 7 Apr 2010
  • SoC and IP: DRAMeXchange says iPad intro will moderate NAND Flash market

    archive
    archive
    By Steve Leibson, Technology Evangelist, Denali Software

    The recent, very successful launch of Apple’s iPad introduces both a new gadget and an entirely new product category to the consumer and business markets. Apple announced last Monday that it had sold more than 300,000 iPads on April 3, the first day that the iPad was available in the US. (That includes pre-orders, of course.) Note that this number tops the first…
    • 7 Apr 2010
  • SoC and IP: DDR3/DDR2 price crossover reached

    Denali Blog
    Denali Blog
    Guest Blogger: Marc Greenberg, Director, Technical Marketing

    The day is finally here - DRAMExchange.com quoted that the session average price of 1Gbit DDR3-800 parts on April 2nd was $3.03 while 1Gbit DDR2-800 was $3.04.

    Only DDR2 memory manufacturers will be celebrating... you should realize that this point has been reached because of rising prices on DDR2 to meet the DDR3 prices, not because of falling DDR3…
    • 6 Apr 2010
  • Verification: When Less Is More, Part 2: Is e Code Really Up to 3x More Compact Than SystemVerilog?

    teamspecman
    teamspecman

    In my last post I wrote some packet generation code to validate the claim that e code can be up to 3 times more compact vs. the equivalent functionality in SystemVerilog.  The result was actually an e description that was more than 3x less than the SystemVerilog equivalent.  In this post, let’s see if these lopsided ratios carry forward to coverage as well.

    If a user wanted to add coverage to the generation example…

    • 6 Apr 2010
  • Digital Design: IR Drop Analysis: It's Not Really Necessary, Is It?

    PeteMc
    PeteMc

    I was recently asked by an engineering manager if running IR drop analysis was really necessary. The argument to support his question was that his engineering team always over-designs the power rails, and so the risk of getting high IR drop was so small that analysis was not required.

    The easiest way to answer his question was to relate what actually happened during the creation of a DAC demo a number of years…

    • 5 Apr 2010
  • Analog/Custom Design: Things You Didn't Know About Virtuoso: It's Video Time!

    stacyw
    stacyw

    Just a quick post to let you know that there have recently been a whole truckload of videos added to the Cadence Online Support Video Library.  (Some shameless self-promotion here--I created many of them...).  Simply go to https://support.cadence.com/ (registration required) and choose Resources->Video Library.  You may want to set up your product preferences to only view those product areas you're interested in. 

    …
    • 1 Apr 2010
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