Find Other Members ►

Get email delivery of the Cadence blog (individual posts).

Community

Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

Breakfast Bytes: Sunday Brunch Video for 31st July 2022

Paul McLellan

https://youtu.be/bym7Az0BZdY Made in my Mini Monday: Cadence Expands into Molecular Simulation with Acquisition of OpenEye Scientific Tuesday: Automobil Elektronik Kongress 2022 Wednesday: AEK: Semiconductors: The Base for the Software-Defined C...
- 31 Jul 2022
Analog/Custom Design: Virtuosity: Custom IC Design Flow/Methodology - Circuit Physical Verification & Parasitic Extraction

Ashish Patni

Read this blog for an overview to the Circuit physical verification and parasitic extraction design stage in the Custom IC Design methodology and the key design steps which can help you achieve this.
- 29 Jul 2022
Breakfast Bytes: July Update: ST, GF, Arm, GPUs...and just CHIPS

Paul McLellan

Finally, a monthly update which appears in its advertised slot on the last Friday of the month. ST and GF in Crolles When planar transistors ran out of steam due to leakage, the reason was that too much of the channel was far from the gate and s...
- 29 Jul 2022
Analog/Custom Design: Start Your Engines: An Innovative and Efficient Approach to Debug Interface Elements with SimVision MS

Andre Baguenie

This blog introduces you to an efficient way to debug interface elements or connect modules in a mixed-signal simulation.
- 28 Jul 2022
Breakfast Bytes: AEK: Powerpoint Is Easy—Change is Hard

Paul McLellan

I wrote my first post about Automobil Elektronik Kongress 2022 earlier this week. That was largely about the first day of the conference. Normally, the first day goes to all the big names in German automotive, such as Mercedes, BMW, Audi, Bosch,...
- 28 Jul 2022
System, PCB, & Package Design : SI/PI Simulation and Measurement Correlation Forum

Maxwell86

Join this insightful on-demand webinar event "SI/PI Simulation and Measurement Correlation Forum" available through Signal Integrity Journal that features industry expert presentations ranging from chip to package to complex board designs.
- 27 Jul 2022
Breakfast Bytes: AEK: Semiconductors: The Base for the Software-Defined Car

Paul McLellan

At this year's Automobil Elektronik Kongress, there was a panel session titled Semiconductors: The Base for the Software-Defined Car. Given the troubles of the automotive industry over the last couple of years with semiconductor shortages, maybe ...
- 27 Jul 2022
Computational Fluid Dynamics: Seakeeping Observations of SA Agulhas II Using Cadence Fidelity FINE/Marine

Veena Parthan

The shift left approach is slowly being realized and employed in the marine industry to reduce the time to market, and hence, there is widespread use of CFD tools for the early prediction of faults in the ship design cycle.
- 26 Jul 2022
Breakfast Bytes: Automobil Elektronik Kongress 2022

Paul McLellan

For me, the must-attend event to understand what is going on in the automobile industry is Automobil Elektronik Kongress (AEK), held each year in the small town of Ludwigsburg just outside Stuttgart. Stuttgart is the home of both Mercedes-Benz and Po...
- 26 Jul 2022
Verification: Stay Ahead of Competition with Real-Time Cross-Team Collaborations

Vinod Khera

To stay ahead in competition in chip design real-time collaborations ensure traceability, speedy innovations at reduced the cost.
- 25 Jul 2022
Life at Cadence: What’s Driving the Automotive Industry in 2022?

Corbin Ward

Cars are becoming computers on wheels with more processing power than the average personal computer. Automotive trends are driving growth in use of semiconductors.
- 25 Jul 2022
Breakfast Bytes: Cadence Expands into Molecular Simulation with Acquisition of OpenEye Scientific

Paul McLellan

This morning, Cadence announced that it has entered into a definitive agreement to acquire privately held OpenEye Scientific Software Inc, a leading provider of computational molecular modeling and simulation software being increasingly used by ...
- 25 Jul 2022
Analog/Custom Design: Spectre Tech Tips: Introducing Spectre X EMIR Voltus-XFi

Stefan Wuensche

This blog describes the new capabilities in Spectre 21.1 ISR2 through which it provides support to the Voltus-XFi Custom Power Integrity Solution.
- 22 Jul 2022
Breakfast Bytes: CadenceLIVE: Pegasus on AWS, Let Physical Verification Fly

Paul McLellan

At CadenceLIVE Silicon Valley, Ahmed Elzeftawi of AWS and Dibyendu Goswami of Cadence presented Pegasus TrueCloud for Gigascale Physical Verification using Hybrid Cloud on AWS. Amed is a Senior Partner Solutions Architect for Semiconductors and EDA, ...
- 22 Jul 2022
Academic Network: Cadence Academic Network at 59DAC

Kira Jones

The Cadence Academic Network was excited to participate in many activities at the 2022 Design Automation Conference (DAC) held at the Moscone Center in San Francisco from July 10-14. We were proud to sponsor the DAC Young Fellows Program and Ph.D. Fo...
- 21 Jul 2022
System, PCB, & Package Design : In-Design Analysis in the Cloud with Cadence OnCloud

Sherry Hess

Last month at CadenceLive Silicon Valley, Cadence introduced a software-as-a-service (SaaS) cloud platform - aka OnCloud. This new offering provides designers with instant access to system design and analysis products, namely in-design mul...
- 21 Jul 2022
Breakfast Bytes: ITF USA: Luc Van den hove on Deep Tech

Paul McLellan

The afternoon of the Monday of SEMICON West is always the Imec Technology Forum (ITF) USA, held in the Marriott. Now that DAC is co-located with SEMICON West, this doesn't work so well since there are presentations at both events that overlap. Howeve...
- 21 Jul 2022
System, PCB, & Package Design : System Analysis Knowledge Bytes: Accelerating Early Stage Design Sign-Off Using PCIe 5.0 Compliance Kit in Topology Workbench

Akshaya Kumar

This blog talks about how the Cadence®︎ AdvancedSI tools, which are packaged in the Topology Workbench environment, support the complete PCIe 5.0 channel characterization.
- 20 Jul 2022
Breakfast Bytes: CadenceLIVE: Do You Know What CMP Is?

Paul McLellan

I was talking to someone at Cadence recently and I was surprised that he didn't know what CMP is. To me, it is one of the most unlikely steps in the manufacture of integrated circuits. CMP stands for chemical-mechanical-polishing or chemical-mech...
- 20 Jul 2022
System, PCB, & Package Design : Shift Left: Moving Multiphysics into the Mainstream

Sherry Hess

As electronic systems have grown incrementally more complex, with more features packed into a smaller footprint, signal rates rising, and production schedules becoming ever more aggressive, there simply is no room or time for multiple design cycles and prototype failures. To succeed in today’s highly competitive electronics markets, a practice called “shift left” is becoming increasingly popular.
- 19 Jul 2022
Breakfast Bytes: Andreas Kuehlmann and Tortuga Logic...I Mean Cycuity

Paul McLellan

I was in San Francisco for the RSA security conference. On Monday, it has tutorials and the conference has its opening keynote at 3 pm. So I had lunch with Andreas Kuehlmann. At the time of our lunch, he was CEO of Tortuga Logic, but the company has ...
- 19 Jul 2022
RF /マイクロ波設計: μWaveRiders:新しいPythonライブラリは、Cadence AWR Design Environmentで高レベルのAPIを提供します

RF Design Japan

新しいPythonライブラリは、Pythonのコーディング規則により厳密に準拠したコマンド構造を使用して、PythonとAWRソフトウェア間のインターフェイスを容易にするために作成されました。このライブラリには「pyawr-utils」というラベルが付いており、標準のPythonpipコマンドを使用してインストールされます。 pyawr-utilsをインストールして使用するための包括的なドキュメントが利用可能です。
- 18 Jul 2022
RF Engineering: μWaveRiders: New Python Library Provides a Higher-Level API in the Cadence AWR Design Environment

TeamAWR

A new Python library has been written to facilitate an interface between Python and AWR software using a command structure that adheres more closely to Python coding conventions. This library is labeled "pyawr-utils" and it is installed using the standard Python pip command. Comprehensive documentation for installing and using pyawr-utils is available.
- 18 Jul 2022
Breakfast Bytes: June Update: CHIPS, Minis, and DI Water

Paul McLellan

My monthly update normally occurs on the last Friday of the month. But for June, that was two weeks ago. Cadence was off for an extended July 4th break, and then I was on vacation, and then DAC, so I decided to make today the honorary last Friday of ...
- 18 Jul 2022
Verification: Xcelium PowerPlayBack App and Dynamic Power Analysis

Vinod Khera

Learn how Xcelium PowerPlayback App enables the massively parallel Xcelium replay of waveforms for glitch-accurate power estimation of multi-billion gate SoC designs.
- 18 Jul 2022

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.