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Featured

When AI Becomes Part of Your Analog Design Workflow

If you design analog or mixed-signal circuits, each silicon generation asks you to…

Corporate
• 6 min read
Virtuoso AI Studio , featured , agentic ai , IP Catalog , analog design

Virtuoso Studio IC25.1 ISR8 Now Available

Virtuoso Studio IC25.1 ISR8 production release is now available for download.

Virtuoso Release Team
• 5 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Analog Design Migration Made Easy With Migration Cockpit

Analog IP remains one of the most valuable and difficult-to-scale assets in semiconductor…

Vinod Khera
• 5 min read
featured , analog IP , Automated test bench migration , parasitic aware optimization , Front to back Analog Migration
Analog/Custom Design
Latest blogs

Spectre 26.1 Release Now Available

We are pleased to announce the availability of Spectre®︎ 26.1, delivering innovations…

• 5 min read
GPU-Accelerated Circuit Simulation , Electrothermal Co-Simulation , Process-Based Save Restart (PBSR) , Reliability Analysis and TDDB , Electromigration and IR Drop Analysis (EMIR) , Spectre26.1 , Spectre X Performance Enhancements , Spectre Circuit Simulator , ADE , Fast Monte Carlo Analysis , Radiation-Aware Circuit Design , Smart Corners Analysis , AI-Driven Design Analysis

Virtuoso AI Studio: Finding Specific Y-Values with Vertical Markers

Tired of manually searching waveforms for specific signal values? Read this blog…

• 4 min read
Analog Design Environment , Virtuoso AI Studio , ViVa-XL , Virtuoso Studio , ADE Explorer , bus , Virtuoso Visualization and Analysis XL , virtuoso visualization and analysis , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , ViVA , ADE Artist , Virtuoso Video Diary , analog design , Custom IC , ViraStack AI Super Agent , ADE Assembler

Virtuoso AI Studio IC26.1 Now Available

Virtuoso AI Studio IC26.1 production release is now available for download.

• 9 min read
Virtuoso AI Studio , Cadence blogs , IC26.1 , IC Release Announcement blog , IC Release Blog , Custom IC Design , Cadence Community

When AI Becomes Part of Your Analog Design Workflow

If you design analog or mixed-signal circuits, each silicon generation asks you to…

• 6 min read
Virtuoso AI Studio , featured , agentic ai , IP Catalog , analog design , AI , ViraStack AI Super Agent

Powering the Future of Sustainable IoT: World's Lowest-Power MCU

As AI, smart infrastructure, and connected devices spread into more parts of everyday…

• 5 min read
analog/mixed-signal , Virtuoso , sustainability , Internet of Things

The One Transistor That Became a Thousand - Without You Drawing It Twice

Drawing every transistor variant by hand doesn't scale — change the width, the fingers…

• 7 min read
Component Description Format , CDF , Virtuoso Studio , Relative Object Design , PCells , rod , Custom IC Design , Virtuoso Layout Suite , SKILL

From Waveform to Root Cause: Debugging Mixed-Signal Designs with SimVision MS

Learn how SimVision MS connects waveforms, mixed nets, connect modules, schematic…

• 6 min read
AMS , mixed signal design , AMS Designer , Mixed-Signal , SimVision-MS , AMS Verification

Fix It Faster: The Secret Virtuoso Tool You're Not Using

Virtuoso suddenly slows down. Do you restart, call IT, or keep guessing? Before you…

• 4 min read
IC26.1 , diagnostic center , Layout , Virtuoso , analog design , health Monitor , Custom IC , Virtuoso Layout Suite XL

Make the Right Layout Decisions Earlier

Explore how Virtuoso Design Planner brings hierarchy, connectivity, placement, and…

• 3 min read
Virtuoso Studio , Layout EXL , Mixed-Signal , Layout Suite , Virtuoso Analog Design Environment , Layout , Virtuoso , Design Planner , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , Custom IC

Earn, Validate, and Showcase Your IC Design and Verification Expertise

Turn technical learning into trusted, shareable recognition with Cadence training…

• 3 min read
Accelerated_Learning , Virtuoso Studio , EDA , training , webinar , digital badges , training bytes , Semiconductor , ask

Spectre MDL: Turn Simulation Results into Reusable Measurements

Running a simulation is only half the job. Engineers must also extract useful measurements…

• 3 min read
Spectre , Custom IC

From Simulation Data to a Clear Story: Meet the Datasheet Interface 2.0

You have completed several simulations. Now you need to answer a simple question…

• 4 min read
Virtuoso Studio , Virtuoso Analog Design Environment , training bytes , Virtuoso , Custom IC , ADE Assembler

Virtuoso Studio IC25.1 ISR8 Now Available

Virtuoso Studio IC25.1 ISR8 production release is now available for download.

• 5 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design

From “Where Do I Click?” to Confident Virtuoso IC Layout Designer

What if the moment you opened Virtuoso no longer felt overwhelming-but empowering…

• 4 min read
IC25.1 , Cadence blogs , Layout EXL , digital badges , Layout , Virtuoso , Virtuoso Layout Suite , Custom IC

Achieve Real-World Noise Simulation with Spectre Transient Noise Analysis

From Ideal Signals to Real-World Behavior In today's advanced analog and mixed…

• 5 min read
blended , blended training , Cadence blogs , cadence , learning , Spectre Circuit Simulator , training , Virtuoso ADE , Virtuoso Analog Design Environment , Cadence training , digital badges , training bytes , Virtuoso , Spectre , Cadence certified , learning map , Virtuoso Video Diary , spectre x , online training , Custom IC

Virtuoso Studio: Turning S-Parameter Data into Actionable Insights

Read this blog to learn how the S-Parameter Assistant simplifies RF and microwave…

• 2 min read
S-parameter Analysis , S-parameter , ViVa-XL , Virtuoso Studio , ADE Explorer , Virtuoso Visualization and Analysis XL , virtuoso visualization and analysis , S-Parameter Quality Checking tool , Virtuoso Analog Design Environment , Spectre , ViVA , ADE Artist , Custom IC Design , ADE Assembler

Analog Design Migration Made Easy With Migration Cockpit

Analog IP remains one of the most valuable and difficult-to-scale assets in semiconductor…

• 5 min read
featured , analog IP , Automated test bench migration , parasitic aware optimization , Front to back Analog Migration , PPA , Analog Design Migration , schematic migration

Virtuoso Studio IC25.1 ISR7 Now Available

Virtuoso Studio IC25.1 ISR7 production release is now available for download.

• 5 min read
IC25.1 , Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design

From Layout to Silicon: Mastering Parasitic Extraction with the Quantus Training

From fundamentals to advanced nodes, discover how Quantus training helps VLSI engineers…

• 6 min read
parasitic-aware design , parasitic , Quantus Extraction Solution , qrc , Quantus , Parasitic extraction , parasitics

Using Reliability Degradation Parameters to Drive Better Design Choices

A circuit can look perfect on day one and still drift out of specification after…

• 6 min read
blended , blended training , Analog Design Environment , Cadence blogs , Virtuoso Studio , custom/analog , ADE Explorer , Analog Simulation , analog , training , Virtuoso Analog Design Environment , Cadence training , analog/mixed-signal , digital badges , training bytes , Virtuoso , Spectre , Analog Design Environment , Circuit Design , IC Release Blog , Custom IC Design , online training , Custom IC , Cadence Community , ADE Assembler

Smart Corners Analysis Helps You Focus on the Conditions That Matter the Most!

Imagine you are designing a precision analog block targeted for a high‑volume product…

• 5 min read
blended training , Corners , Cadence blogs , Spectre FMC Analysis , Virtuoso Studio , Spectre FMC , analog , Fast Monte Carlo Analysis , worst case corners , Monte Carlo analysis , Virtuoso Analog Design Environment , digital badges , training bytes , Virtuoso , ADE Artist , Custom IC Design , Custom IC , Cadence Community

Virtuoso Studio: Excellent XL – Analyze and Fix Connectivity with Analyzer

Click here to see how Connectivity Analyzer helps you analyze connectivity markers…

• 3 min read
IC25.1 , Annotation Browser , Connectivity Issues , Connectivity Markers , Virtuoso Layout Suite , Connectivity Analyzer

Virtuoso Studio IC25.1 ISR6 Now Available

Virtuoso Studio IC25.1 ISR6 production release is now available for download.

• 4 min read
IC25.1 , Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design

Virtuoso Studio: Excellent XL – How to Keep Layout XL Up to Date with Ease

On‑canvas binding highlights provide color‑coded visibility of binding status across…

• 4 min read
IC25.1 , lvs closure , binding highlights , LVS binding , Custom IC Design , Virtuoso Layout Suite

Electrically Aware Design: Catch EM and IR Drop Issues Early with EAD

As designs move to advanced nodes, interconnect reliability is pushed to its limits…

• 5 min read
EAD , electromigration , Cadence blogs , Virtuoso Studio , electrically-aware design flow , Simulation-driven interactive routing , LDE , digital badges , Custom IC Design , SDR , ADE Assembler

Liberate Trio: A Scalable Answer to Advanced-Node Characterization

The Growing Pain No Library Team Can Ignore If you're working on standard-cell…

• 4 min read
nldm , AdvancedNodes , HighPerformanceComputing , MultiPVT , library characterization , recharacterization , ChipDesignTraining , bolt , Recovery characterization , CadenceLiberate , LiberateTrio , Debugging Techniques in Liberate Trio , VLSItraining , Liberate , MPVT characterization , Liberty , StandardCellLibraries , ParallelProcessing , ECSM , CCS , liberty model , Model Files , EDAlearning

Virtuoso Studio: Excellent XL – Automated Layout XL Binding from LVS Data

Click here to discover how Virtuoso Studio IC25.1 uses LVS svdb data for automated…

• 2 min read
Virtuoso Layout Suite MXL , arc , svdb , Layout Xl Binding , LVS-based Binding , Application Readiness Checker , Virtuoso Layout Suite XL

Analog Circuit Modeling Using Verilog-A within Virtuoso: A Video Series

A Practical Video Series that connects Verilog‑A Modeling to Real Circuit Behavior…

• 6 min read
Cadence blogs , ADE Explorer , Virtuoso Analog Design Environment , analog behavioral models , training bytes , Virtuoso , Spectre , Custom IC Design , Verilog-A
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