Community

At this year's CDNLive, AdaptIP presented their experiences with high-level synthesis (HLS), in particular Cadence's Stratus HLS product. The presenter was billed as being Farhad Mighani but he couldn't make it, so instead it was Mike Sharp and Mike ...

At CDNLive Silicon Valley this month, Cadence announced a new family of ADE tools:  Virtuoso ADE Explorer, Assembler, Verifier and VVO (Virtuoso Variation Option).  So I'd like to start with a special section highlighting the COS content which will show you all the great new features in those tools.

Virtuoso ADE Explorer and ADE Assembler New…

Academic research often requires the learning of new concepts and techniques in a short amount of time, and the tools that you are using shouldn't be an obstacle in themselves. Rapid Adoption Kits (RAKs) are highly recommended for a quick ramp-up in the...

Tom Beckley gave the final keynote before lunch here at CDNLive in Silicon Valley. To set the scene, he told the story of watching the Space Shuttle Challenger launch in Florida where he worked for Hughes at the time. It was January 28, 1986, and as we...

I finished reading Don Dingee and Dan Nenni's book, Mobile Unleashed, the Origin and Evolution of ARM Processors in Our Devices. I guess by way of disclosure I should say that Don and Dan both blogged with me on SemiWiki for several years before I...

In this week's Whiteboard Wednesdays video, Jacek Duda describes the relationships between USB Type-C, USB 3.1, and Power Delivery specificationss, and gives examples of applications for each.

https://youtu.be/ZX--iVohGW4

By now, you have probably heard about the new family of Virtuoso ADE tools, publicly introduced at CDNLive Silicon Valley. If not, go take a look!

The new tools work with a new database and viewname called "maestro". (That's Italian for "master", in case there are any logophiles out there.) So we will need to create a new cellview. Wait--don't run away--it's one command. You can do it right now without even opening a…

The new Virtuoso^® ADE product suite enables designers to fully explore, analyze, and verify their design against design goals so that they can maintain design intent throughout the design cycle. As the industry’s leading solution for analog simulation control and management, the Virtuoso ADE product suite allows users to flexibly select the product(s) that best support their design needs as they move through the design…

There are a lot of changes going on in the environment in which analog design gets done. In the past, a lot of analog designs were relatively small designs in non-leading-edge processes. These chips would go into specialized markets such as automotive...

In the early days, like all the larger EDA companies, Cadence grew through a mixture of acquisition (for example, the Tangent routing technology), internal development (such as the Virtuoso platform) and, most especially, acquiring technology that was...

Blue Gecko is a system on chip (SoC) created by Silicon Labs to provide wireless connectivity. With the name Blue Gecko, you won't be surprised that it supports Bluetooth. Blue Gecko is actually one of a family of SoCs targeted at IoT applications. The...

The Cadence Academic Network was proud to sponsor the Student Day at embedded world 2016. embedded world is the number one international gathering place for all aspects of embedded system technologies, with 939 exhibitors from 38 countries, six huge halls...

Last night, Bob Smith, the executive director of what was EDAC, announced the new name and the new mission. The organization will henceforth be the Electronic System Design Alliance.

When EDAC was founded in 1989, chip design was all about EDA. There...

We have an exciting Design IP track at CDNLive Silicon Valley again this year. ARM, Mellanox, Broadcom, and Hardent talk about important IP technology topics. And Cadence will be sharing some of the latest about our technology development.

Take a look at the full agenda—and don't miss the Design IP track (track 11) on Wednesday!

The Design IP track is comprised of: 

• DES201: Dinesh Venkatachalam, Broadcom…

Welcome to the new home of all things related to the Virtuoso® Analog Design Environment. Our intention is to use this space to give you helpful tips on using the tools and to introduce you to newly released features that you might not realize are available to you. We will have contributions from our field AE staff, product engineering team, R&D and, occasionally, the marketing guy, but we promise not to post a lot…

I sat down and talked with Amjad Qureshi recently He is vice president of research and development for the DDR PHY and controller IP. My first assumption, that he joined Cadence with the Denali acquisition, turned out to be wrong. But he does have a 25...

In this week’s Whiteboard Wednesdays video, Jeffrey Chung talks about the progression of DDR and LPDDR: capacity, speed, and types of applications that would be appropriate for each.https://youtu.be/OIENKye7hNA

I have always had a passing interest in encryption and security. My PhD is on network file systems, where managing who has access to what data is an important aspect. I also spent the best part of a year working for a biometric security company (fingerprints...

Several new features have been added to the 16.6-2015 SiP release.

Read on for more details …

Co-Design Die Editing in Symbol Edit Application Mode

The Symbol Edit Application Mode has been expanded to operate on co-design dies as well. A co-design die is one that was created by the loading of a die abstract. Using the Symbol Edit Application mode, you can refresh a co-design die symbol and also view and edit die…

Are you busy debugging your environment topology and coming up against components getting unexpected data? Have you found yourself asking “who is passing data to this monitor, and why?”?

Components in the environment interact using ports (TLM ports, method ports, simple ports, and so on). This blog tackles the challenge of debugging a “bad connection”—an in port bound to the wrong out port…

Through the 1990s, Cadence made lots of smaller acquisitions. In 1997, Joe Costello stepped down as CEO and passed the reins to Jack Harding, who had joined Cadence earlier that year when Cadence had acquired Coopers and Chyan Technology, which had a...

Far more often than we imagine, we think about China within the context of the complicated technology we create. The ‘I want it now’ generation is driving the need for higher performance products and that need is increasingly fulfilled by companies in China. That’s why we went for Tech Shanghai 2016. And we brought gifts.

The electronics industry in China can be measured as a million souls, although…

TSMC is a manufacturing powerhouse. It has twice the capacity of any other non-memory semiconductor company. It has the best yield in the industry, driven by collecting over 1M datapoints per second from the equipment in its fabs. They are the only company...

In two weeks time (or a fortnight as we say in Britain) is CDNLive Silicon Valley: April 5-6 in the Santa Clara Convention Center. While there are some presentations by Cadence employees, the buik of the presentations are by real users of Cadence tools...