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System, PCB, & Package Design : IC Packagers: Determining Minimum Spacing Values in a Design

Tyler

I don’t remember the first time I was asked this question. At its core, the question was one of finding not the minimum constraint value in the design, but instead the minimum ACTUAL spacing value for a given set of objects in the design. As we...
- 19 May 2020
Breakfast Bytes: A History of Neural Networks

Paul McLellan

Research on biological neurons started back in the 1940s, before computers, and long before integrated circuits. Some research started at IBM in the 1950s to model neurons and, in 1956, the Dartmouth Summer Research Project on Artificial Intelligenc...
- 19 May 2020
Verification: Interconnect Beyond PCIe: CXL and Cache Coherent Interconnect

Lana Chan

As the de facto IO interconnect technology, PCIe has commendably addressed the performance bottleneck at the IO interface by doubling the bandwidth support every 3-4 years over the course of 5 generations of the specification and with Gen 6 at 64GT/s in the works. However, the datafication of everything requires that the raw data be processed and/or harvested for meaningful information. The high computational workloads…
- 18 May 2020
Academic Network: Learning in a Virtual World

Kira Jones

The Cadence Academic Network enables you to access Cadence tools remotely, and, in order to make your virtual learning a success, we want to provide some tips to help you learn at home like a pro! Once you’ve taken the time to implement these h...
- 18 May 2020
Analog/Custom Design: Virtuosity: Rewind and Replay the Top 10 Cadence Virtuosity and Virtuoso Video Diary Blogs

Rishu Misri Jaggi

With new content being posted nearly every week under Custom IC Design Blogs, there's a lot this space can tell you about Virtuoso. Let me help you find some of our most viewed posts...
- 18 May 2020
定制IC芯片设计 : Virtuoso Meets Maxwell：Virtuoso射频解决方案——流程一体化的技术改革

michaelthompson

我刚刚从马萨诸塞州的波士顿，这个极具革命盛名的地方回到家，在那我参加了2019国际微波大会（IMS 2019）。今年峰会很精彩，不仅因为波士顿风景迷人，更因为这里是“麻省理工辐射实验室（MIT Radiation Lab）”的诞生地，其创建于1940年代初，并于1951年更名为“林肯实验室“，是现代微波理论和设计的摇篮。时至今日，辐射实验室研究的28卷许多内容，仍与塞缪尔·西尔弗（Samuel Silver）的微波天线理论和设计（12卷）保持高度的相关性，它也是我的最爱。
- 18 May 2020
Breakfast Bytes: Which Passwords Should You Change?

Paul McLellan

I was talking to someone who consults to Cadence on various aspects of security. He told me not to use his name...must be for security reasons. He had been reading some of my posts on passwords, in particular: Passwords: How Even Your Bank Doesn&#3...
- 18 May 2020
Breakfast Bytes: Sunday Brunch Video for 17th May 2020

Paul McLellan

https://youtu.be/We9eDDOn-Cg Made in "Instanbul" (camera Carey Guo) Monday: Why Create an SoC? Tuesday: Happy Birthday Florence Nightingale: Nurse, Statistician, Feminist Wednesday: John Park's Webinar on Chiplets Thursday: 3G and 4G: The Internet Ar...
- 17 May 2020
PCB、IC封装：设计与仿真分析: 极致PCB设计全流程 I 技巧三：规则管理器应用技巧

SDA China

本期技巧篇内容与大家分享规则管理器（Allegro® Constraint Manager，简称CM）中输入数据的几个细节操作以及“信号不允许表层布线”的规则设置: 对于复杂PCB设计，规则比较多，规则设置更是一大挑战。关注CM中的细节操作，既能让您的设计更加高效，也可以避免数据输入失误对于特殊设计——信号不能表层布线，通过本期技巧，为它们赋予相应规则，实现精准控制关注微信公众号“Cadence楷登PCB及封装资源中心&...
- 15 May 2020
PCB、IC封装：设计与仿真分析: 极致PCB设计全流程 I 基础三：有效进行规则设置

SDA China

规则驱动设计理念：通过正确抽象、完整设置的规则，为PCB设计质量保驾护航。设计过程中，保证设计者的行为正确是至关重要的，如果规则出现问题，那么过程执行得再好都无济于事。 Good、Better、Best、Super，如果在这些级别中选出最贴切我们对Constraint Manager使用程度的描述，您会是在什么级别呢？ “极致PCB设计全流程”第三期基础篇“有效进行规则设置”为您解答。关注微信公众号“Cadence楷登PCB及封装资...
- 15 May 2020
Life at Cadence: My Life at Cadence Video Series: Sneharsi Nag

Mary Kasik

Cadence recently interviewed five of our amazing women engineers for a new video series titled, “My Life at Cadence”! This first video features Sneharsi Nag, Senior Applications Engineer. …the primary person who actually influence...
- 15 May 2020
Digital Design: SSV 20.1 Base Release Now Available

SSV Release Team

The SSV 20.1 production release is now available for download.
- 15 May 2020
System, PCB, & Package Design : BoardSurfers: Three Steps to Using Embedded Components

mrigashira

If you think embedding components in a PCB just reduces product size, well that's true but that's only half the truth. Embedding components also increases performance and reduces transmission loss. So it's about miniaturization and performance with e...
- 15 May 2020
Breakfast Bytes: Tensilica HiFi DSPs with Dolby Atmos for Soundbars

Paul McLellan

Do you know what a soundbar is? Years ago, if you wanted to build a good home theater then you'd need a TV projector (or a projection TV) costing over $10,000, and a set of expensive speakers to go with your Dolby 5.1 ("five point one&...
- 15 May 2020
Digital Design: Library Characterization Tidbits: Reuse to Recharacterize - Improve Productivity with Liberate MX

KamleshSinghDodiya

A write up on how Liberate MX effectively enables you to characterize only the failed or new arcs.
- 15 May 2020
Verification: Catching up with Higher Ethernet Speed: VIP Supports 802.3ck

Dave Huang

Draft 1.0 of 802.3ck, also known as 100G per lane, was finally published by IEEE in Dec 2019. This draft provided the standardization of higher lane speed support for backplane systems, including 3 speed mode variations: 100G, 200G, and 400G. Backplane Ethernet speed is increasing, evolving from 10G, 25G, 50G, to current 100G on a single SerDes lane within less than 10 years, offering unprecedented capacity for the datacenter…
- 14 May 2020
Verification: Sizing Up eUSB2 Verification

Dave Huang

USB is one of the most widely used interfaces in the PC market for more than 20 years. Though it remains the same form in laptops and servers, it never stops its evolution in terms of capacity and speed. Embedded USB2.0, known as eUSB2, was created to address the concerns of power efficiency and portability. Although eUSB2 largely reuses USB2.0 protocol layer, the verification of eUSB2 can be never thought of as a miniature…
- 14 May 2020
Verification: Why Is the Evolving HBM3 Such a Revolutionary Technology and How Can You Be Ready for It?

Thierry Berdah

Since 2013, we have seen the HBM specifications being released by JEDEC and companies announcing in the same month HBM products just like magic. How can these companies have a silicon-proven product altogether with newly announced official specifications? What is the secret process they use in order to be constantly first-in-market with these new technologies? And more important, what can YOU do in order to also be such…
- 14 May 2020
Breakfast Bytes: 3G and 4G: The Internet Arrives

Paul McLellan

In posts over the last couple of weeks, I covered 1G and 2G mobile: 1G Mobile: AMPS, TOPS, C-450, Radiocom 2000, and All Those Japanese Ones 2G: Mobile Goes Digital Today it is the turn of 3G, 3.5G, and 4G. I'll omit the angels-on-a-pinhead wa...
- 14 May 2020
Breakfast Bytes: John Park's Webinar on Chiplets

Paul McLellan

Recently Cadence's John Park presented a webinar on Design Methodologies for Next-Generation Advanced Multi-Chip(let) Packaging. Gordon Moore, famous for Moore's Law among other things, also predicted that this day would come. Over 50 years ag...
- 13 May 2020
Analog/Custom Design: Virtuoso IC6.1.8 ISR11 and ICADVM18.1 ISR11 Now Available

Virtuoso Release Team

The IC6.1.8 ISR11 and ICADVM18.1 ISR11 production releases are now available for download.
- 13 May 2020
System, PCB, & Package Design : New PCIe SI Challenges Conquered Using Clarity 3D Field Solver for PCB

Sigrity

Figure 1: High-performance PCIe-based graphics card There is a trend in the data center industry moving toward heterogeneous computing in order to satisfy workloads that are computationally intensive. These trends are driving the development of soft...
- 12 May 2020
System, PCB, & Package Design : IC Packagers: The Choice Between Static and Dynamic Shapes

Tyler

That title might be a touch misleading. We’re not here to talk about why to convert shapes between static and dynamic. Rather, I want to talk about why you should NOT be doing this. Every design has some conductor shapes in it (or at least a ve...
- 12 May 2020
Breakfast Bytes: Happy Birthday Florence Nightingale: Nurse, Statistician, Feminist

Paul McLellan

Today is the 200th anniversary of the birth of the first woman member of the Royal Statistical Society (in London, the title is unqualified since there were no other statistical societies). I've written a bit about her before in my post The Lady...
- 12 May 2020
System, PCB, & Package Design : Challenges of On-Chip Thermal Analysis in Electronic System Designs

CTKao

In the beginning of our universe, enormous amount of heat or energy was generated and released during the period of 0 to 10-43 sec, in theory while backed up by models and measurements, about 13.8 billion years ago. Since then, a variety of phy...
- 11 May 2020

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