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Latest Blog Posts

  • 定制IC芯片设计 : Virtuoso Meets Maxwell: TILP! 什么是TILP?

    kgjudd
    kgjudd
    过去的38年,我一直致力于IC版图设计!在业内不断推出Cadence的新产品,让我积累了宝贵的经验。在这篇博客中,我要谈谈另一创新产品--Virtuoso RF解决方案及其基本概念。对于不了解Virtuoso RF解决方案的电路封装设计师 ,或是第一次在Virtuoso进行封装设计的IC版图设计师而言,这些概念都是必须掌握的。
    • 1 Jun 2020
  • Breakfast Bytes: The Five Waves: AI, 5G, Cars, Clouds, IoT

    Paul McLellan
    Paul McLellan
    In Cadence's recent earnings call, Lip-Bu Tan, our CEO, talked about the five waves that are hitting us simultaneously. Here's what he said: Yes. John, it's a good question. First of all, I'm excited about this industry, because it's very unusual t...
    • 1 Jun 2020
  • Verification: Improving Tests Efficiency Using Coverage Callback

    teamspecman
    teamspecman

    When you go to the store, you walk until you get there, stop, get your groceries, and go back home. You do not start circling around the block for few rounds. You do not say “if I walk around the block really fast, I can save time”. It is clear that if you avoid circling the block at first place – you will save even more time.

    Why don’t we adopt the same rationale in the verification process? Instead…

    • 31 May 2020
  • Breakfast Bytes: Sunday Brunch Video for 31st May 2020

    Paul McLellan
    Paul McLellan
    www.youtube.com/watch Made in "Paris" (camera Carey Guo) Monday: Memorial Day Tuesday: Simon Butler's Fireside Chat with Jim Hogan Wednesday: Automotive Ethernet Thursday: 5G: Connecting All the Things Friday: First US Manned Launch Sin...
    • 31 May 2020
  • Breakfast Bytes: First US Manned Launch Since 2011...Not Yet

    Paul McLellan
    Paul McLellan
    On Wednesday, SpaceX and NASA planned the first launch from the USA of a manned spacecraft in nearly a decade (US-built, too). The last launch, in 2011, was the final flight of the Space Shuttle. It was back in 1981, when the shuttle first flew,...
    • 29 May 2020
  • カスタムIC/ミックスシグナル: Virtuosity: Automated Device Placement and Routing - デバイスグループとトポロジーの特定

    Custom IC Japan
    Custom IC Japan
    前回に続き、Virtuoso® 自動デバイスレベル配置配線シリーズの2回目のBlogをご覧ください。 前回は、アナログとフルカスタムデザインでの完全自動型のデバイスレベル配置配線ソリューションの必要性についてお話しました。今回は、このプロセス中の重要なステップである、「デバイスグループと、配置配線用のトポロジーの特定」について掘り下げていきます。 課題 アナログ設計の核となるものは、正確性とマッチングです。 ゲイン、消費電力、Voltage スイング、あるいはノイズといった様々な...
    • 29 May 2020
  • カスタムIC/ミックスシグナル: Virtuosity: Virtuoso の自動デバイスレベル配置配線ソリューションのご紹介

    Custom IC Japan
    Custom IC Japan
    半導体産業は、IC デザイン向けの電子設計自動化ソフトウェア(EDA)に長期に渡り依存してきました。長年に渡る半導体産業の進化に合わせて、EDA ツールも進化してきました。 しかしながら、アナログ、フルカスタム用EDA ツールの進化は、デジタル用ツールのそれに比べて、劇的ではありませんでした。この背景にはいくつかの理由があります。レイアウトの自動生成を難しくした最も重要なものに、自動生成のレイアウトをマニュアルレイアウトのクオリティに一致させること。加えてアナログデザインでは、デジタルデザイ...
    • 29 May 2020
  • Digital Design: Library Characterization Tidbits: Overriding the One-Sigma Rule of Liberty for LVF Modeling

    AbhaRawat
    AbhaRawat
    As per Liberty specification, Liberty Variation Format (LVF) modeling is always done at one-sigma. However, did you know that Liberate Variety supports unique settings for characterization and LVF modeling?
    • 28 May 2020
  • Breakfast Bytes: 5G: Connecting All the Things

    Paul McLellan
    Paul McLellan
    Over the last few weeks, each Thursday has been Telecom Thursday (like Taco Tuesday but with guacamobile). Well, except for last week since Cadence had a surprise 4-day holiday weekend announced at the last minute. 1G Mobile: AMPS, TOPS, C-450, Rad...
    • 28 May 2020
  • Breakfast Bytes: Automotive Ethernet

    Paul McLellan
    Paul McLellan
    Automotive networking is perhaps the latest application area for Ethernet. But Ethernet in some form has been going for nearly 50 years. Let's start with a little history. History Ethernet really started in 1971, although it was called AlohaNet. It ...
    • 27 May 2020
  • System, PCB, & Package Design : BoardSurfers: Allegro In-Design Coupling Analysis: Crosstalk Mitigation without Models

    Shirin Farrahi
    Shirin Farrahi
    Just as social distancing minimizes human contact to prevent the spread of disease, PCB spacing constraints minimize coupling between traces to prevent crosstalk problems for drivers and receivers. In cases where a safe distance cannot be maintained,...
    • 26 May 2020
  • System, PCB, & Package Design : IC Packagers: Keep Fan-Out Routing Aligned During ECOs

    Tyler
    Tyler
    When a change comes in from your IC design partner, it can be met with trepidation. How drastic is the change? What impact will it have on the package routing and (potentially) even the layer count needed to fan out the die? Will the bond finger tier...
    • 26 May 2020
  • Breakfast Bytes: Simon Butler's Fireside Chat with Jim Hogan

    Paul McLellan
    Paul McLellan
    Way back in what now seems like the distant past, but was early March, I wrote a post From Bootstrapped Startup to Profitability—with Lunch about an upcoming ESD Alliance event. Of course the event was rescheduled and went online...and lun...
    • 26 May 2020
  • Analog/Custom Design: Virtuoso Meets Maxwell: How to Route a Package in Virtuoso?

    Alex Soyer
    Alex Soyer
    Let’s explore how a package design looks like in Virtuoso, how it can handle planes as well, and how to route the package quickly and cleanly.
    • 25 May 2020
  • Breakfast Bytes: Sunday Brunch Video for 24th May 2020

    Paul McLellan
    Paul McLellan
    www.youtube.com/watch Made in "Hawaii" (camera Carey Guo) Monday: Which Passwords Should You Change? Tuesday: A History of Neural Networks Wednesday: It's the Second Mouse That Gets the Cheese Thursday: Memorial Day: Conway and Collatz ...
    • 24 May 2020
  • Analog/Custom Design: Start Your Engines: The Why and How of Generating Spectre Netlists for Analog Blocks Using UNL

    Qingyu Lin
    Qingyu Lin
    Read to know about generating netlist in the Spectre native format using AMS UNL.
    • 21 May 2020
  • System, PCB, & Package Design : BoardSurfers: Footprint Creation Using a STEP Model in Library Creator

    Sanjiv Bhatia
    Sanjiv Bhatia
    Read how you can easily create accurate footprints from a vendor-provided STEP Model using Allegro ECAD-MCAD Library Creator.
    • 21 May 2020
  • Breakfast Bytes: Memorial Day: Conway and Collatz

    Paul McLellan
    Paul McLellan
    Do you know what the Collatz Conjecture is? John Horton Conway died recently, as I briefly reported in my post Weekend Update. He worked on many aspects of mathematics: "number theory, game theory, coding theory, group theory, knot theory, topol...
    • 21 May 2020
  • Breakfast Bytes: It's the Second Mouse That Gets the Cheese

    Paul McLellan
    Paul McLellan
    I love short phrases that make you think, "Wait...what?" and then you think about it and gradually realize it is true. A good example is the title of today's blog post: "It's the second mouse that gets the cheese". Product...
    • 20 May 2020
  • System, PCB, & Package Design : IC Packagers: Determining Minimum Spacing Values in a Design

    Tyler
    Tyler
    I don’t remember the first time I was asked this question. At its core, the question was one of finding not the minimum constraint value in the design, but instead the minimum ACTUAL spacing value for a given set of objects in the design. As we...
    • 19 May 2020
  • Breakfast Bytes: A History of Neural Networks

    Paul McLellan
    Paul McLellan
    Research on biological neurons started back in the 1940s, before computers, and long before integrated circuits. Some research started at IBM in the 1950s to model neurons and, in 1956, the Dartmouth Summer Research Project on Artificial Intelligenc...
    • 19 May 2020
  • Verification: Interconnect Beyond PCIe: CXL and Cache Coherent Interconnect

    Lana Chan
    Lana Chan

     As the de facto IO interconnect technology, PCIe has commendably addressed the performance bottleneck at the IO interface by doubling the bandwidth support every 3-4 years over the course of 5 generations of the specification and with Gen 6 at 64GT/s in the works. However, the datafication of everything requires that the raw data be processed and/or harvested for meaningful information. The high computational workloads…

    • 18 May 2020
  • Academic Network: Learning in a Virtual World

    Kira Jones
    Kira Jones
    The Cadence Academic Network enables you to access Cadence tools remotely, and, in order to make your virtual learning a success, we want to provide some tips to help you learn at home like a pro! Once you’ve taken the time to implement these h...
    • 18 May 2020
  • Virtuosity: Rewind and Replay the Top 10 Cadence Virtuosity and Virtuoso Video Diary Blogs

    Analog/Custom Design: Virtuosity: Rewind and Replay the Top 10 Cadence Virtuosity and Virtuoso Video Diary Blogs

    Rishu Misri Jaggi
    Rishu Misri Jaggi
    With new content being posted nearly every week under Custom IC Design Blogs, there's a lot this space can tell you about Virtuoso. Let me help you find some of our most viewed posts...
    • 18 May 2020
  • 定制IC芯片设计 : Virtuoso Meets Maxwell:Virtuoso射频解决方案——流程一体化的技术改革

    michaelthompson
    michaelthompson
    我刚刚从马萨诸塞州的波士顿,这个极具革命盛名的地方回到家,在那我参加了2019国际微波大会(IMS 2019)。今年峰会很精彩,不仅因为波士顿风景迷人,更因为这里是“麻省理工辐射实验室(MIT Radiation Lab)”的诞生地,其创建于1940年代初,并于1951年更名为“林肯实验室“,是现代微波理论和设计的摇篮。时至今日,辐射实验室研究的28卷许多内容,仍与塞缪尔·西尔弗(Samuel Silver)的微波天线理论和设计(12卷)保持高度的相关性,它也是我的最爱。
    • 18 May 2020
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