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カスタムIC／ミックスシグナル: Spectre Tech Tips: Spectreのハイインピーダンスノードチェックの概要

Custom IC Japan

回路チェックは、ハイインピーダンスノード、電源間のリークパス、タイミングエラー、電力の問題、接続の問題、急激なrise/fallといった、典型的な設計問題を解析することができます。回路チェックはDynamicチェックとStaticチェックに分けることができます。Dynamicチェックは過渡解析中に実行されます。Staticチェックはトポロジーチェックでありシミュレーションは必要ありません。このブログでは、Spectreで用意されているハイインピーダンスノードのチェックについて、そし...
- 25 Aug 2021
System, PCB, & Package Design : BoardSurfers: Training Insights: Creating and Applying Spacing Constraint Sets in Allegro Constraint Manager

Sanjiv Bhatia

When designing a PCB layout, all the constraints and design rules must be followed to avoid design issues and ensure that the board works as intended. Constraints are rules that you apply to different objects in your design, nets, and XNets to ensur...
- 25 Aug 2021
Analog/Custom Design: Virtuoso Meets Maxwell: How the Revamped Feature-Intensive Export Die GUI Empowers You

deeptig

Die export has evolved and it’s time to introduce the new look and feel of the GUI alongside the new features added to bring an abstract view to the next level. The GUI has been redesigned to offer improved usability that matches the evolving use model. The new tab-based GUI has also been made scalable to facilitate the inclusion of further options in the future.
- 25 Aug 2021
Breakfast Bytes: "I'm Doing an Operating System, Just a Hobby, Won't Be Big and Professional"

Paul McLellan

30 years ago today, August 25, 1991, an unknown Finnish student sent out what has become a famously low-key email that had a dramatic effect on technology in general, especially data centers and supercomputers. It has to be one of the most important ...
- 25 Aug 2021
Breakfast Bytes: HOT CHIPS: Esperanto's Dave Ditzel and 1000 Minions

Paul McLellan

At HOT CHIPS this morning, Dave Ditzel of Esperanto is presenting their latest chip in a talk titled "Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip" I actually had a pre-bri...
- 24 Aug 2021
System, PCB, & Package Design : IC Packagers: New Releases Are Full of New Stuff!

Tyler

This marks our third and final look at the biggest new features in this major update. We’ve already looked at features spanning from performance gains to improvements in the graphical canvas. Updates to the base product and items for the advanc...
- 24 Aug 2021
中文技术专区: 针对GPGPU设计，Cadence RTL到Signoff流程解密

FormerMember

近年来，随着GPU在通用计算领域的高速发展，逐渐将应用范围扩展到图形之外，例如人工智能、深度学习和自动驾驶。这些领域的特点要求GPU在并行处理海量数据的同时提供更高的访存速度和浮点运算能力。在这种计算密集度越来越高的情况下，我们也面临越来越严峻的挑战，比如在后端摆放和绕线阶段的拥塞问题，如何比较精确地在较早阶段考虑物理信息，预测布局变得尤其重要；在并行同步的信号会增多，大量的矩阵运算引入的情况下，Glitch Power占比会显著提高，如何在较前阶段去分析和避免glitch 功耗是我们避不开的难题；同时由于GPU重运算和流水线的设计加上众多旁路分支结构， OCV影响会更加显著，如何评估和解决时钟上OCV是解决时序收敛的关键因素。针对以上GPGPU面临的挑战和痛点，Cadence提供了一整套从RTL到signoff的全流程解决方案。
- 23 Aug 2021
System, PCB, & Package Design : System Analysis Knowledge Bytes: Signal, Power, and Thermal Integrity using Layout Workbench

kmayank

The System Analysis Knowledge Bytes blog series explores the capabilities and potential of the System Analysis tools offered by Cadence®. In addition to providing insight into the useful features and enhancements in this area, this series aims to...
- 23 Aug 2021
Breakfast Bytes: CadenceLIVE: Xilinx's Thunder-Bus

Paul McLellan

At CadenceLIVE Americas in June, Raghukul presented on Thunder-Bus, a low-latency bridge between Xilinx FPGAs to accelerate system validation. Since Cadence's Protium X1 and X2 are also built using Xilinx FPGAs, Thunder-Bus can be used to co...
- 23 Aug 2021
SoC and IP: PCIe for Automotive - DesignCon/DriveWorld 2021

TomWong

DesignCon 2021, Drive World Conference, and Embedded Systems Conference are a joint event this year. Cadence had an opportunity to present at a session on behalf of PCI-SIG. The topic of the presentation is "PCI Express Technology: Accelerating Automotive Connectivity, from Infotainment to ADAS." I covered the portion on automotive trends and highlighted the various new automotive applications that are driving the transition…
- 20 Aug 2021
Academic Network: Academic and Entrepreneur Tracks at CadenceLIVE Europe 2021

Anton Klotz

CadenceLIVE Europe 2021 will be hosted on October 19th. This year will be a virtual event again, but we put in a lot of effort to make it entertaining and informative to fight the Zoom fatigue! The Academic Track had so many interesting papers to b...
- 20 Aug 2021
Computational Fluid Dynamics: CFD, Cars, and Cadence - Two Events Next Week

John Chawner

The Cadence CFD team is excited about two automotive engineering events next week at which we'll be participating and presenting some of our latest advancements. We hope you can join us. 4th International Conference in Numerical and Experimental ...
- 20 Aug 2021
Breakfast Bytes: Rowhammer: Beating DRAM into Submission

Paul McLellan

Way back in 2014, a DRAM vulnerability called Rowhammer was revealed. This is a silicon vulnerability. As the capacity of DRAMs has gone up, the size of the capacitor that holds each bit has shrunk, and as a result each bit is represented by fewer an...
- 20 Aug 2021
Life at Cadence: My Life at Cadence: Nick Phillips

Lautanen

People come to Cadence to have meaningful careers, work with some of the brightest talent in the industries, and help some of the world’s leading innovators shape the future of technology at Cadence. Careers at Cadence are multifaceted as we di...
- 19 Aug 2021
Breakfast Bytes: Tensilica ConnX B10 in GF 22FDX for Automotive Grade 1

Paul McLellan

At CadenceLIVE Americas back in June, GlobalFoundries presented a case study on using a Tensilica ConnX B10 DSP in their 22FDX process in a design that had to meet automotive grade 1 requirements. The study was to see what was the impact on power, pe...
- 19 Aug 2021
Breakfast Bytes: BlackHat: Hacking a Capsule Hotel—Ghost in the Bedrooms

Paul McLellan

Security conferences always seem to have at least one interesting presentation that tells a fascinating story, albeit with a serious underlying security message. Here are three from the last few years (and this post is another one). RSAC: Motherhood...
- 18 Aug 2021
System, PCB, & Package Design : ASCENT: Accessing System Capture Functions Through a Browser-Based Dashboard

Auromala

So, if you are an electronics design program manager or team manager, it’s unlikely that you work directly with any design tools, such as System Capture. However, you might still want quick access to ECAD data, including project lists, Live BOM...
- 17 Aug 2021
Breakfast Bytes: Aerospace and Defense Day

Paul McLellan

At the end of July, Cadence had its CadenceCONNECT Aerospace and Defense Day. For the rest of this post, I'm just going to say A&D for Aerospace and Defense. The focus of A&D Day was the same as a major focus of the Department of Defense ...
- 17 Aug 2021
System, PCB, & Package Design : IC Packagers: What Else Is There to Know About the New Release?

Tyler

Last week we looked at new features largely targeting your manufacturing flow. Layer-based degassing improvements, acute angle corrections, and tools to perform a layout-vs-layout comparison of your intended manufacturing mask against the original de...
- 17 Aug 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

A brief notice here that this Friday the 13th is also This Week in CFD day. Of note within the compilation of CFD news and notes are two long-ish documents. One is on the future of HPC architectures and the second is on the HPC needs of energy market...
- 13 Aug 2021
System, PCB, & Package Design : BoardSurfers: Reasons to Move to 17.4-2019 Hotfix019 of Allegro PCB Editor

Monika

Cadence OrCAD and Allegro 17.4-2019 Hotfix 019 was rolled out in mid-July and is now available for download. In this update, we bring to you many new and enhanced features across multiple technological areas, fixes for customer-reported bugs, ...
- 13 Aug 2021
System, PCB, & Package Design : (P)SpiceItUp: Speed and Reliability Through Tried and Tested TI-PSpice Models

mrigashira

When time and quality are at a premium and you are in a hurry to meet a tight schedule, access to 5000 tried and tested TI-PSpice models across 100 categories, not to mention the 4000 test circuits, definitely gives you the edge you needed. You can q...
- 13 Aug 2021
PCB設計／ICパッケージ設計: (P)SpiceItUp: PSpice Part Searchを用いて、カテゴリ、概要、または機能 (Category, Description, or Function)で検索

SPB Japan

設計者としては、回路設計の初期段階での要件はまったく異なります。つまり、回路デザインを実装するときに必要な部品情報と、テストや解析のためにシミュレーションするときに必要な部品情報は性質が異なるのです。実装時には使用したい部品番号がわかっているので、部品番号に基づいて検索を行います。設計を解析用にシミュレーションする際には、機能的な動作を知る必要があります。解析の世界では、正確な部品番号はわからなくても、その部品の機能的な動作については大体わかっているものです。例えば、オペアンプ、アナログ・デジ...
- 12 Aug 2021
PCB設計／ICパッケージ設計: (P)SpiceItUp: ５ステップによるシミュレーションプロファイル

SPB Japan

回路が完成したら、いよいよシミュレーションを行います。最初のステップは、シミュレーションプロファイルの定義です。シミュレーションプロファイルは、どのような解析を実行するか、またどのようなリソースを使用するか、例えば、シミュレータのパーツを定義するモデルなど、を制御します。シミュレータアプリケーションは、回路とシミュレーションプロファイルを受け取り、その結果を表示します。異なるプロファイルを設定し、同じ回路を異なる環境でテストすることができます。この記事では、PSpice® A/...
- 11 Aug 2021
PCB設計／ICパッケージ設計: (P)SpiceItUp: 相対と絶対公差による精度と速度の管理におけるオプションのパワー

SPB Japan

PSpice®には、Simulations SettingsダイアログボックスのOptionsタブに、強力でありながら見落とされがちな機能があります。このタブに用意されているデフォルト値は、ほとんどの状況に対応していますが、稀ではありますが、あり得ないことではないため、いつ値をいじりたくなるかわからないので、知っておいた方が良いでしょう。いずれにしても、これらのパラメータの多くで制御されている許容範囲は、結果の正確さを決定する上で重要であり、正確さが目標である以上、そのニュアンスを知るこ...
- 11 Aug 2021

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