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Latest Blog Posts

  • Breakfast Bytes: RSA: Bruce Schneier

    Paul McLellan
    Paul McLellan
    I have been following Bruce Schneier for a long time. He literally wrote the book on cryptographic algorithms, Applied Cryptography, in two editions, both of which I own. He has run an email newsletter, Crypto-Gram, since 1998 (subscribe). He has a b...
    • 4 Apr 2019
  • Academic Network: Best Paper Award at LATS2019 for Zhan Gao

    Anton Klotz
    Anton Klotz
    The IEEE Latin-American Test Symposium (LATS) is an annual forum attended by professionals and technologists from all over the world.  It is an event where various aspects of system, board, and component testing and fault-tolerance are presented...
    • 3 Apr 2019
  • System, PCB, & Package Design : BoardSurfers: Validating Your Shapes

    Tyler
    Tyler

    BoardSurfers: Cadence Allegro BlogYour design is near completion. Except that you’ve got an area of your plane shape that stubbornly refuses to fill, and you don’t know why. Understanding the rules involved and the tools available to help you figure out – and make changes, if needed, to get the result you want – is critical to make sure you aren’t wasting valuable design cycles.

    Thankfully, the Cadence® Allegro® platform…

    • 3 Apr 2019
  • Breakfast Bytes: Geoff Hinton, Yann LeCun, and Yoshua Bengio Win 2019 Turing Award

    Paul McLellan
    Paul McLellan
    This year's Alan Turing Award goes to Geoff Hinton, Yann LeCun, and Yoshua Bengio. According to the New York Times, they are the "Godfathers of Deep Learning", presumably in the non-mafia sense ("nice neural network you've got ...
    • 3 Apr 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - When it Comes to Cloud-Based Design, One Size does Not Fit All

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Tom Hackett describes how different types of companies possess different combinations of 3 key assets needed for successful cloud-based electronics design.  Since their assets are different, the solutions they need for cloud-based design are also different.

    https://youtu.be/RVSlR8ZPRuo

    • 2 Apr 2019
  • Breakfast Bytes: Bringing Clarity to System Analysis

    Paul McLellan
    Paul McLellan
    Today, at CDNLive Silicon Valley, Lip-Bu Tan, Cadence's CEO, announced the Clarity 3D Solver during his keynote. This is the first product in Cadence’s system analysis effort, break-through EM simulation technology that delivers 10X performance...
    • 2 Apr 2019
  • Verification: Cadence Announces Continued Partnership With Northrop Grumman

    XTeam
    XTeam

    On March 28th, 2019, Cadence Design Systems announced an expanded collaboration with Northrop Grumman centering on advanced-node SoC projects. Cadence’s cutting-edge verification tools are combining with Northrup Grumman’s expertise to deliver high performance ASICs  more efficiently. Northrop Grumman will be using the full flow of Cadence ASIC development tools including verification, digital synthesis and…

    • 1 Apr 2019
  • Verification: Cadence Leads the Pack: The First VIP for USB4 is Here!

    XTeam
    XTeam

    On March 14th, Cadence announced the release of the industry’s first USB4-supporting Verification IP! The Cadence VIP for USB4 allows engineers to design and create cutting-edge SoC designs compliant with the current standards that are completely functionally verified and require less time.

    “Support from [USB Implementers Forum] members like Cadence helps reduce the barriers to adoption of new USB protocols and…

    • 1 Apr 2019
  • Breakfast Bytes: CloudBurst: The Best of Both Worlds

    Paul McLellan
    Paul McLellan
    I think if you were starting a new semiconductor company, you would go straight for a cloud-based solution and not bother with the cost and complexity of building up your own datacenter, and the black-belt IT department needed to install an...
    • 1 Apr 2019
  • Breakfast Bytes: Sunday Brunch Video for 31st March 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/2_zmjd8wM0c Made on my balcony (camera Carey Guo) Monday: AI Index Tuesday: 8 Ways to Get the Most out of CDNLive Silicon Valley Wednesday: The Ladybird Book of Quantum Mechanics Thursday: Scaling EDA in the Cloud Friday: Twenty Year...
    • 31 Mar 2019
  • PCB、IC封装:设计与仿真分析: Cadence专家培训计划正式启动

    SDA China
    SDA China
    感谢您对Cadence的关注与支持,我们的微信服务号“Cadence楷登PCB及封装资源中心”已正式上线。我们遵循Cadence所倡导的 “系统设计实现” 策略助力工程师们优化设计、缩短开发周期、打造行业领先产品。 我们在传递最新行业动向、观点要闻的同时更加专注于与大家分享PCB及封装设计、SI/PI、多物理场仿真分析等领域的技术干货与培训资源。 在这里,大家将获得: 最新、最详细的教学视频、白皮书、会议讲义、产品说明书等技术资料的查看与下载;...
    • 29 Mar 2019
  • 定制IC芯片设计 : Virtuosity: 交互辅助布线命令的快捷键使用指南

    Parula
    Parula
    摘要: 对于使用快捷键(bindkeys)的好处,相信您在日常工作中已深有体会。 那么,为了帮助用户获得更好的体验,本文介绍了Virtuoso 交互辅助布线相关的常用快捷键,赶快阅读,获取更多信息!
    • 29 Mar 2019
  • Breakfast Bytes: Twenty Years in the Matrix

    Paul McLellan
    Paul McLellan
    It is hard to believe, but Sunday will be the 20th anniversary of The Matrix. It was released on 31st March 1999. I'm going to assume you've seen it. At this point, if you haven't, it's probably somewhat spoiled for you anyw...
    • 29 Mar 2019
  • System, PCB, & Package Design : BoardSurfers: Dynamic Shape Voiding – Getting the Most Out of the Tool

    Tyler
    Tyler

    BoardSurfers: Cadence Allegro BlogDynamic shapes; whether used on a negative or positive artwork layer, for power, ground, or signal; are the next most common element of a design after components and routing. The importance of using them effectively, then, can be the difference between a design that is DRC-free, ready on time, and easy to update for ECOs (Engineering Change Orders) and one that you seem to struggle with on a daily basis trying to force…

    • 28 Mar 2019
  • Analog/Custom Design: Spectre Tech Tips: Spectre Assert and Design Check Overview

    Stefan Wuensche
    Stefan Wuensche
    As an analog/mixed-signal designer, verification engineer, or CAD expert, you use Spectre APS for analyzing your designs. Besides performing Spectre simulations to verify that the design works as expected, you may want to check your design for critical device conditions, or typical design problems, such as high impedance nodes, leakage paths, or power consumption problems. This blog provides an overview of the Spectre…
    • 28 Mar 2019
  • Breakfast Bytes: Scaling EDA in the Cloud

    Paul McLellan
    Paul McLellan
    Last year at DAC, we announced Cadence Cloud (for details see my post cleverly titled Cadence Cloud). Of course, one aspect of the cloud is that it allows you to have as much of everything as you need—if you want 100 SystemVerilog simulat...
    • 28 Mar 2019
  • System, PCB, & Package Design : Join us at CDNLive Silicon Valley 2019

    Sigrity
    Sigrity
    Cadence will kick off this year’s CDNLive worldwide user conference series starting with Silicon Valley on April 2-3 at the Santa Clara Convention Center in Santa Clara, California. The keynote presentations begin at 10:30 a.m. and will includ...
    • 27 Mar 2019
  • Breakfast Bytes: The Ladybird Book of Quantum Mechanics

    Paul McLellan
    Paul McLellan
    I mentioned in passing in a recent post that when I was helping teach first-year computer science students at the University of Edinburgh, I used to recommend that they bought a copy of The Ladybird Book of the Computer. Since Ladybird books were gen...
    • 27 Mar 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - FMCW Radar Receiver Signal Processing Using ConnX B20 DSP

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Ramchandra Dabade talks about FMCW radar receiver processing use case and highlights the relevant ConnX B20 features used for different signal processing blocks of the FMCW radar receiver chain.

    https://youtu.be/doaFix2DL_0

    • 26 Mar 2019
  • Breakfast Bytes: 8 Ways to Get the Most out of CDNLive Silicon Valley

    Paul McLellan
    Paul McLellan
    It's CDNLive! Well, not today, Tuesday and Wednesday, April 2nd and 3rd at the Santa Clara Convention Center. So I have eight things you can do to get the most out of CDNLive and go home with a new addition to your wardrobe. And, if you...
    • 26 Mar 2019
  • Breakfast Bytes: AI Index

    Paul McLellan
    Paul McLellan
    The 2018 AI Index Report, developed by scientists and researchers in the AI field was recently released. This report uses quantitative data, such as publication counts or mentions of AI, to assess the state of AI today. I've said a couple of...
    • 25 Mar 2019
  • The India Circuit: The Power of 900 Million Voices

    Madhavi Rao
    Madhavi Rao
    The Indian elections are coming up! In just a few weeks, the first of seven phases of polling will start, kicking off the world’s largest exercise in democracy. The numbers are mind-boggling.   For example, 900 million Indians are eli...
    • 25 Mar 2019
  • Verification: Concurrent Actions in Specman

    teamspecman
    teamspecman

    Lately we have been asked by several customers about the concurrency options in Specman (some refer to it as “What are the Specman options similar to fork…join?”). Apparently, things that are in Specman for ages are likely to be missed. Therefore, this blog describes Specman concurrent actions (existing for years).

    Specman has two actions controlling concurrent execution: all of and first of. Both actions…

    • 25 Mar 2019
  • Breakfast Bytes: Sunday Brunch Video for 24th March 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/FFd9mncMANI Made at SEMICON China (camera Tracy Zhu) Monday: The World Wide Web Was Born 30 Years Ago This Month Tuesday: RSA: From Helen Mirren to Tina Fey Wednesday: RSA Cryptographers' Panel Thursday: #learntoco...
    • 24 Mar 2019
  • Breakfast Bytes: RSA: The Director of the FBI

    Paul McLellan
    Paul McLellan
    Christopher Wray, the current (and the 8th) Director of the FBI, wrapped up the opening keynote session, in discussion with Susan Hennessey of the Brookings Institution. Change Your Facebook Password Today But before I get to that, here's a publi...
    • 22 Mar 2019
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