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Latest Blog Posts

  • Computational Fluid Dynamics: Simulate Wind Turbine Blade Aerodynamics Using High-Quality Automated Meshing

    Veena Parthan
    Veena Parthan
    Dr. Galih Bangga, a scientist with a forte in wind energy research, from the Institute of Aerodynamics and Gas Dynamics (IAG) at the University of Stuttgart, Germany, presented a paper where he discusses about the significance of autom...
    • 13 Feb 2022
  • Breakfast Bytes: Sunday Brunch Video for 13th February 2022

    Paul McLellan
    Paul McLellan
    https://youtu.be/_Rt6kAURffU Made in Rancho San Antonio County Park (camera Carey) Monday: No post Tuesday: The Return of Breakfast Bytes Wednesday: DATE 2022 Now Fully Virtual Thursday: January Update Friday: CadenceLIVE Sil...
    • 13 Feb 2022
  • Breakfast Bytes: January Update

    Paul McLellan
    Paul McLellan
    I realize that it is February, but I was sick late January and so I never wrote this update post. Intel and RISC-V Intel just announced a $1B plan to fund RISC-V-based startups and to attract new foundry customers. I covered Intel's foundry plans...
    • 11 Feb 2022
  • Learning and Support: Webinar Invitation: Enhance your Design Power with Joules

    MJ Cad
    MJ Cad
    Want to take a tour of this powerful power estimation tool and gear up so you understand the Joules flow?  What is this Webinar About? Join Cadence Training and Sr Principal Education Application Engineer Neha Joshi for this free technical...
    • 11 Feb 2022
  • Breakfast Bytes: CadenceLIVE Silicon Valley 2022: You Can Be Part of the Event

    Paul McLellan
    Paul McLellan
    CadenceLIVE Silicon Valley is scheduled for June 8 and 9, and currently it is planned to be in-person at the Santa Clara Convention Center. I will give a full preview nearer the time once the agenda is settled. Call for Abstracts But now it is your c...
    • 10 Feb 2022
  • Computational Fluid Dynamics: Go Zero Emission with Plug-In Buoys for Ships

    Veena Parthan
    Veena Parthan
    There has been persistent traffic in the American ports with tons of containers stacked like toy bricks, one on top of the other, waiting for that one brick at the bottom to break or fail. Cargo vessels waiting for hours in long queues, releasing ton...
    • 10 Feb 2022
  • カスタムIC/ミックスシグナル: Spectre Tech Tips: Spectre 電圧ドメイン・チェック

    Custom IC Japan
    Custom IC Japan
    Spectre®回路シミュレータは、過渡解析やその他の解析を実行することなく、典型的なセットアップや設計上の問題を特定することができる、スタティックまたはトポロジー・チェックの大規模なセットを提供します。このブログでは、スタティック・電圧ドメイン・チェックをレビューします。 モチベーション ミックスド・シグナル設計の多くは、複数の電源ドメインを持ち、高電圧と低電圧のデバイスを含んでいます。デジタル回路は通常低電圧で動作しますが、アナログ、電源、ドライバ回路は高電圧で動作することがあります...
    • 9 Feb 2022
  • Breakfast Bytes: DATE 2022 Now Fully Virtual

    Paul McLellan
    Paul McLellan
    As you can tell from the title of my DATE 2022 preview post Save the DATE: Design and Test Europe 2022, Antwerp the original plan was to have at least some of the event in-person in Antwerp, Belgium. That is no longer happening and the event is ...
    • 9 Feb 2022
  • Verification: Optimizing CPU Time, TAT, and Disk Space using Cadence Xcelium Advanced Technologies for DFT Verification

    Vinod Khera
    Vinod Khera
    Design for Testability (DFT) simulation is crucial to the SOC design process: rapid turnaround time (TAT) allows for faster pattern verification for each netlist release and more iteration cycles during development, while efficient disk space and com...
    • 8 Feb 2022
  • Analog/Custom Design: Virtuoso ICADVM20.1 ISR23 and IC6.1.8 ISR23 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The ICADVM20.1 ISR23 and IC6.1.8 ISR23 production releases are now available for download.
    • 8 Feb 2022
  • 4 Ways Computational Software Is Transforming System Design and Hardware Design

    Life at Cadence: 4 Ways Computational Software Is Transforming System Design and Hardware Design

    Corporate
    Corporate
    System and Hardware Design Strides and Challenges Electronics systems are changing at an accelerating pace, with technologies such as hyperscale data centers, smart devices, 5G communications, building and home automation, self-driving cars and heal...
    • 8 Feb 2022
  • Breakfast Bytes: The Return of Breakfast Bytes

    Paul McLellan
    Paul McLellan
    If you are an avid follower of Breakfast Bytes, and of course, you should be, you'll have noticed it hasn't appeared for a couple of weeks. I got Covid (despite being triple vaxxed). After a couple of days with a fever and a cough, it seemed to be ov...
    • 8 Feb 2022
  • SoC and IP: High-Speed 112G Design and COM Dependencies

    Vinod Khera
    Vinod Khera
    The design impairments such as SoC packaging, package-to-board impedance mismatch, and crosstalk due to front panel and backplane connector, as well as noise coupling could have a significant impact on the bit error rate (BER) in a production system. mentioned in Such design impairments These impairments have a much bigger impact as we move towards 112G data rate because of smaller UI and lower SNR. By prescribing…
    • 7 Feb 2022
  • Life at Cadence: Volunteering in Today’s World

    Lautanen
    Lautanen
    Cadence recently announced its sixth Season of Giving. Giving back is a special part of our culture here at Cadence and we do it not only in during the end of year giving season but all year long. It’s a time to give and to share, and it brings...
    • 7 Feb 2022
  • System, PCB, & Package Design : System Analysis Knowledge Bytes: Tips for Accelerating Power Signoff in Chip-package Co-analysis Using Sigrity XtractIM

    Sanyukta
    Sanyukta
    This blog discusses PLOC grouping optimization which provides the flexibility in the way you define the port groups. Thus, accelerating the time required for signoff and allowing you to run simulations efficiently on modestly equipped computers.
    • 7 Feb 2022
  • The India Circuit: Mentor Story: Roli Sinha - Cadence Scholarship Program

    Asim Khan
    Asim Khan
    Introduced five years ago, the Cadence Scholarship Program is the flagship CSR program of Cadence India. Many meritorious students from under-served sections of society drop out of the education system after school because of the lack of finances. Th...
    • 6 Feb 2022
  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    As my friend Brian says, "Something weekend this way comes." But first, it's time for This Week in CFD. What makes me feel good about this week's news is the large number of events planned to be held in-person. It will be nice to st...
    • 4 Feb 2022
  • Verification: Re-Timer – The Key for High-Speed Signal Transmission in USB4 Systems

    Neelabh
    Neelabh

    The objective of USB4 protocol to achieve high speed signal transmission and thereby providing high data bandwidths for protocol tunneling would not have been possible without USB4 re-timer. Like several other serial protocols where the generation-by-generation higher link speeds are being targeted, USB4 system too needs re-timers, whether On-board or in Active cables, to support 40Gbps link speed.

    Re-timers are protocol…

    • 3 Feb 2022
  • System, PCB, & Package Design : ASCENT: 3 Reasons to Use Live BOM for Your Bill of Materials

    Auromala
    Auromala
    A product is only as good as its components, which makes selecting good components vital. So how does one select the right component? And let’s think about what 'right' means. You have to consider the availability and lead time, the pri...
    • 3 Feb 2022
  • PCB、IC封装:设计与仿真分析: PCB 的 DDR4 布线指南和 PCB的架构改进

    TeamAllegro
    TeamAllegro
    计算机领域总是在持续不断地进步,始终有发展变化和更新迭代等待着我们去体验和探索。从头开始打造一台新的 PC 是一种令人愉悦的体验,有新一代标准时更是如此。说到这里,我们不得不提到有关随机存取存储器 (RAM) 的话题。具体来说是 DDR4 RAM,这恰好是市场上目前的标准。RAM 的重要性众所周知,如果我们问到任何计算机或网络工程师,他们都会表示拥有再多的 RAM 也不为过。 基于 DDR4 实现的 PCB 架构改进 如前文所述,计算机技术领域的格局不断发展变化。随着新标准的出现,设备架构需要...
    • 1 Feb 2022
  • Academic Network: Introducing DATE 2022 Young People Program

    Anton Klotz
    Anton Klotz
    The DATE conference, the biggest EDA conference in Europe will find place 14-23.03.2022, as virtual event. The Young People Program (YPP) at DATE conference is an initiative targeting PhD students with the goal of supporting their career development....
    • 1 Feb 2022
  • The India Circuit: DVCON India 2021 - A Quick Summary

    lokesh123
    lokesh123
    Another DVCon India, the ‘Mecca’ for Design and Verification Engineers, took place from December 14-16, 2021. The theme of this virtual event was on the convergence of AI, 5G and edge computing. DVCon India always provides a superior lea...
    • 31 Jan 2022
  • Life at Cadence: Attain Functional Safety with the Midas Safety Platform

    Vinod Khera
    Vinod Khera
     The rapid increase in innovations such as ADAS, lidar, radar, and automation has led to the proliferation of electronics/semiconductors in cars. With the evolution of hybrid/electric vehicles (EVs), these are expected to reach more than 75% of ...
    • 31 Jan 2022
  • Analog/Custom Design: Spectre Tech Tips: Spectre Voltage Domain Check

    Stefan Wuensche
    Stefan Wuensche
    This blog introduces you to the static voltage domain check in the Spectre circuit simulator.
    • 31 Jan 2022
  • Computational Fluid Dynamics: February Is the Month for CFD Webinars - Register Today

    John Chawner
    John Chawner
    In place of This Week in CFD (gotta pay them bills) I shared today overviews of the three—count 'em, THREE—CFD webinars coming up next month. They cover aerospace and automotive applications, mesh generation, geometry model preparatio...
    • 28 Jan 2022
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