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Life at Cadence: Functional Safety Solutions - How Hailo Ensured ISO 26262 ASIL-B (D) Compliance for Their AI Processor

fschirrmeister

Safety is critically important across the automotive, industrial, and aerospace and defense industries. For instance, Cadence's work with Hailo illustrates how advances in semiconductor technology and EDA deliver safe electronics without compromi...
- 28 Jan 2022
System, PCB, & Package Design : ASCENT: Training Insights: Connecting System Architecture Design and Implementation

Rachna2018

Today we take a break from our regular posts on Allegro System Capture features and basics to announce a Cadence Training webinar on System-Level Design with Senior Application Engineer, Dave Palumbo. What Is this Webinar About? In the produ...
- 28 Jan 2022
RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environment の高度なカスタマイズのヒントとコツ

RF Design Japan

　Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。 AWRソフトウェアのヒントとコツ: AWR Design Environmen...
- 27 Jan 2022
RF Engineering: μWaveRiders: Cadence AWR Design Environment Advanced Customization Tips & Tricks

TeamAWR

The AWR Design Environment is highly customizable. Advanced customization options include using scripts to automate repetitive tasks and create custom parts libraries, creating custom symbols for subcircuits, and using parameterized layout cells.
- 27 Jan 2022
Digital Design: Is your Compression Technique Unified? Wanna Explore?

Neha Joshi

Scan compression is critical for addressing the rapid rise of test costs without sacrificing coverage requirements. Although it has been widely adopted, it has its limitations. In today's era demand is not just high coverage but also the ability to verify that the design is working in the field.

A unified compression is an approach that unifies scan compression and logic built-in self-test (LBIST). It leverages physically…
- 26 Jan 2022
System, PCB, & Package Design : BoardSurfers: An Introduction to Dimensioning in Allegro PCB Editor

Sanjiv Bhatia

With boards becoming more complex and lightweight at the same time, designing and manufacturing a cost-effective and reliable PCB has assumed greater significance than ever before. Inaccurate or incomplete design details can affect the fabrication of...
- 26 Jan 2022
Computational Fluid Dynamics: From EDA to SDA – The Emergence of Intelligent System Design Automation

Steve Brown

Technology innovation is continually transforming our user experience and disrupting the status quo. While much of the focus of technology disruption is on supply chains and business models, there is an underlying revolution happening in the design o...
- 25 Jan 2022
Computational Fluid Dynamics: This Week in CFD

John Chawner

Here are a few teasers for what you'll find in this week's round-up of CFD news and notes. How AI can be trained to identify more objects than are in its learning dataset. Will GPUs really take over and disrupt CFD simulation? A beginner&#39...
- 21 Jan 2022
Computational Fluid Dynamics: DoE INCITE Award for Cadence CFD

John Chawner

We are very excited to be part of a team selected for a Dept. of Energy INCITE Award. The Innovative and Novel Computational Impact on Theory and Experiment program is how the DoE's Office of Science provides the scientific community access ...
- 20 Jan 2022
Breakfast Bytes: PCIe 6.0 Standard Ratified...and Cadence's Implementation

Paul McLellan

The big news about PCIe 6.0 is that the specification has been released by the PCI-SIG. I covered some of PCIe 6.0 in my post The History of PCIe: Getting to Version 6, although a lot of that post was about earlier versions of the standard. More rece...
- 20 Jan 2022
Breakfast Bytes: Tensilica Security

Paul McLellan

2021 was famous for some of the worst security issues (accompanied by obligatory picture of bad guy in a black hoodie): The very first blog post of the year covered SolarWinds. See my post The Biggest Security Breach Ever. The middle of the year saw...
- 19 Jan 2022
Computational Fluid Dynamics: Pipistrel Reduces Energy Consumption Electric Aircraft through Propeller Optimization

AnneMarie CFD

Pipistrel used the propeller as an airborne wind turbine, by transforming the energy created by the descent of an aircraft into electric energy and storing it in a battery. As a result the aircraft consumes 6% less energy during climb. and net energy consumption during ascent/descent manoeuvres decreased by 19%. The performance of the propeller design was numerically computed with Omnis Turbo and this article describes…
- 18 Jan 2022
Breakfast Bytes: Computational Fluid Dynamics, Software, and Chip Design

Paul McLellan

There are a lot of commonalities between computational fluid dynamics (CFD), software, and chip design. All of them create a specification of the object of interest, and eventually use that representation as part of the manufacturing process. In betw...
- 18 Jan 2022
Life at Cadence: My Life at Cadence: Dajana Danilovic

Lautanen

Today’s interview features Dajana Danilovic, an application engineer based near Munich, Germany. In this video, Dajana shares about her pathway to becoming an engineer, as well as the importance of great teamwork and good communication. She has...
- 17 Jan 2022
CFD（数値流体力学): FINE /MARINE 10.2 国内公式リリース

CFD Japan

FINE/Marineの最新バージョンでは、耐航性計算の高速化、抵抗計算の粗メッシュ初期化、Rhinoプラグインによるジオメトリ準備の高速化、解適合格子の改善などが行われています。 C-Wizardに2つの画期的な機能が追加されました。耐航性計算の高速化：クラスター環境などがないユーザー様でも、現実的な計算時間で耐航性計算ができるようになりました。非定常シミュレーションは、実質的に精度を落とすことなく、半日で終了します。ぜひお試しください。抵抗計算のための粗いメッシュの初期化：ワンク...
- 16 Jan 2022
Computational Fluid Dynamics: This Week in CFD

John Chawner

Welcome, CFDers, to a new year of CFD news, applications, software, events, and general fluid dynamics fun. To pay the bills before jumping into this week's topics, there are two Cadence CFD events coming up that you really should register for. ...
- 14 Jan 2022
Breakfast Bytes: Offtopic: Headlines

Paul McLellan

Monday is Martin Luther King Jr. Day. Breakfast Bytes will not appear and so today, the last post before the holiday, I go offtopic. Not too far off-topic, since this affects blogging as well as being amusing. Headlines and Titles One problem with he...
- 14 Jan 2022
PCB設計／ICパッケージ設計: ASCENT: ブラウザベースのダッシュボードからSystem Captureの機能にアクセスする

SPB Japan

エレクトロニクス設計のプログラムマネージャーやチームマネージャーであれば、Allegro® System Captureなどの設計ツールを直接使って仕事をすることはまずないでしょう。それでも、ECADデータに素早くアクセスしたいケースもあります。具体的には、プロジェクトリスト、Live BOMデータ、Unified Search、パーツリクエスト、特定のデザインなどに。例えばデザインレビューや進捗状況把握、リスク評価などのため、これらのデータにアクセスする必要があります。問題ありません...
- 13 Jan 2022
Breakfast Bytes: Jasper User Group Best Paper 2021

Paul McLellan

The annual Jasper User Group was held in November. I've already written several posts about the event: Jasper User Group Preview Announcing Jasper C2RTL App: Formal for Algorithmic Designs Datapath Formal Verification 101: Technology and Techniq...
- 13 Jan 2022
PCB設計／ICパッケージ設計: IC Packagers: IC Package Designでの既製部品に関するサポート

SPB Japan

Allegro® Package Designer Plusの17.4-2019 HotFix 019より前のバージョンでは、デザイン上でClassがICタイプの部品はすべてDie-stack Editorに表示されます。もしその部品が既製の調達部品であるならば、Die-stack Editorに表示されるのは好ましいことではありません。既製部品がDie-stack Editorに表示されることを抑止するための対策として、部品のClassをdiscreteにする方法もあります。しかしなが...
- 13 Jan 2022
SoC and IP: Improving Performance and Throughput While Implementing FFT Using Tensilica ConnXB20 DSP with TIE

Vinod Khera

Real-time FFT performance in Radar, Lidar, and ADAS applications is limited by data bandwidth, data reordering and shuffling of data, and increases in complexity as the size of FFT increases. Using a parallel FFT architecture scheme eliminates such limitations and results in better resource utilization and up to 3126 X speed up.
- 12 Jan 2022
Breakfast Bytes: The State of the RISC-V Union, part II

Paul McLellan

This is part 2 of my post on DAC and RISC-V from December. The first post is here. This post will cover Krste's presentation and then Calista back at the end to wrap up the conference and talk about the future. Krste Krste started on a similar ...
- 12 Jan 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Sigrity Xによる次世代シグナル/パワーインテグリティソリューション

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を広くお伝えすることを目的としています。 1965年、ゴードンムーアは、半導体産業の将来を予測しながら、高密度集積回路 (IC) 内のトランジスタ数が2年ごとに2倍になるとい...
- 12 Jan 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Layout Workbenchへ移行したSPEEDEM

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を広くお伝えすることを目的としています。あなたの人生の中で、いつか新しい地域の新しいアパートに引っ越すかもしれません。それには、大変な作業が伴いますよね？しかし同時に、新...
- 11 Jan 2022
System, PCB, & Package Design : Welcome to 2022: A World of Possibilities in IC Packaging!

Tyler

Hello, everyone, and a happy new year! Last year was incredibly exciting for IC Packaging, with all the emerging options coming with silicon interposers, 3DIC innovations, and so much more. The options we are seeing continue to expand at lightning sp...
- 11 Jan 2022

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