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Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
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Blog - Post List
Latest blogs

Verification

Report From the Advanced Verification Techtorial in San Jose Tuesday 10/28

I'm excited to report that Tuesday's techtorial, covering a range of topics underneath…

• 1 min read
Verification methodology , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , OVM , techtorial

Verification

The Power of Cadence System Power Flow vs. Viewing from the Top

I feel that I must respond to the following blog published by Frank Schirrmeister…

• 6 min read
Incyte Chip , System Design and Verification , Incisive Enterprise Simulator , Palladium , power engineer , C-to-Silicon , Power Analysis , Frank Schirrmeister

Verification

ESC Boston: Day 2

This morning before heading to ESC it dawned on me that the park across the street…

• 4 min read
System Design and Verification , ESC , ISX , Coverage Driven Verification

Analog/Custom Design

Video Demo: ViVA-XL - Fast Waveform Viewing

It’s happened to each of us at some point in time. Your long simulation is finally…

• less than a min read
ViVa-XL , MMSIM , Simulators , Custom IC Design , Fast Waveform Viewing

System, PCB, & Package Design 

What's Good About Directive Locking?

Do you wish you could lock specific aspects of a DEHDL design content? Do you need…

• 5 min read
CPM Directive Control , DEHDL , Directive Lockhing , PCB design , SPB16.01

Verification

Virtualization Taxonomy

I arrived safe and sound at the Embedded Systems Conference in Boston today. It's…

• 2 min read
VM ware , virtualization , taxonomy , real-time systems , Embedded Systems Conference , System Design and Verification , ESC

Verification

OVM Momentum and Interoperability

The question of how to integrate legacy VMM VIP into OVM verification environments…

• 1 min read
OVM Professionals Network , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , OVM , VIP , Verification IP modeling

Verification

Verification Techtorial in San Jose next Tuesday 10/28

Apologies for the shameless promotion, but I can't resist touting an event I'm producing…

• less than a min read
Verification methodology , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , OVM , techtorial

Verification

Formal Moment Of Zen

Most of my experience in functional verification prior to my dabbling in FPV was…

• 3 min read
OVL , FPV , Functional Verification , Formal Analysis , SCV , SVA , FIFO , PSL , Simulation acceleration , SystemC

System, PCB, & Package Design 

Need some stability in your Package Power?

It is not too late to sign up for the Package Power Integrity webinar that will be…

• less than a min read
PDN , IC Packaging & SiP design , SPB16.2 , SSN

Verification

Is Host-Code Execution History?

Before getting into the details of today's topic I'm happy to report a brand new…

• 5 min read
Cisco , System Design and Verification , MIPS , Palladium , Sun , Verilog , OVP , ARM , Virtutech , QEMU

Digital Design

Getting Started with dbGet

If you've been checking out the other blogs here in the Digital Implementation community…

• 2 min read
database access , SoC-Encounter , dbGet , dbSet

Verification

Top 5 Stumbling Blocks In FPV Adoption

My first post served as a context for this blog. It also telegraphed my intention…

• 5 min read
verification strategy , Verification methodology , Functional Verification , Formal Analysis , Model-checking , Testbench simulation , Coverage-Driven Verification

Verification

More on today's Verification IP portfolio expansion news

Today's announcement on our expanding Verification IP (VIP) portfolio inspired me…

• less than a min read
Functional Verification , Verification IP modeling , multi-language

Digital Design

An Interview with Global Timing Debug Architect Thad McCracken

So who is Thad McCracken and why should you be interesting in reading this blog entry…

• 8 min read
SoC-Encounter , Ostrich , Global Timing Debug

Verification

Getting more value from the OVM using Metric-Driven Verification - Part II

In my last post , I talked about how OVM is a methodology for building automated…

• 1 min read
metric driven verification (MDV) , Functional Verification , OVM , ARM , Incisive Enterprise Simulator (IES)

Verification

Early Embedded Systems Conference Coverage

Today, a friend sent me a link to an article on embedded.com that talks about my…

• less than a min read
System Design and Verification , Embedded Systems Boston Conference

Verification

Is there a 1 Billion gate chip on your roadmap?

Yes, I'm asking about chips that will have 1 billion -- that's billion with a "B…

• 1 min read
verification strategy , Verification methodology , Functional Verification , System Verification

Digital Design

createPGPin to the rescue: getting the power pins you want in your block LEF

Hi Everyone! Welcome to my first blog post! My plan for this space is to share with…

• 2 min read
SoC-Encounter , lefOut followpins , LEF , createPGPin
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