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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Verification

Make Your Command Line Life Easier With "specman -e"

Hi All, It always amazes me to see just how many Specman users make use of the interactive…

• 1 min read
Specman , Incisive Enterprise Simulator (IES) , IES

Verification

Who said Cadence Can't Invent New Technology Anymore?

I and the rest of the Cadence C-to-Silicon Compiler (CtoS) team were thrilled yesterday…

• 1 min read
deepchip , System Design and Verification , C-to-Silicon

Verification

Shout-out: Q1 2009 DV Club Schedule Posted

Last month I had the pleasure of attending a DV Club lunch presentation on analog…

• less than a min read
events , verification strategy , Verification methodology , Functional Verification

Verification

Thanks for a Great 2008!

Even though 2008 will probably go down in history as the year of Doom and Gloom we…

• 1 min read

Digital Design

It’s the Season of Giving – Send Me Your Design Innovations!

In the last blog, I wrote about innovating your way out of recession with new designs…

• 2 min read
digital Implementationg , innovation , encounter

Verification

Using e Ports

The other day I saw some posts to the Yahoo Specman group regarding e ports. The…

• 3 min read
IEEE 1647 , Specman , verification strategy , Verification methodology , Testbench simulation , e , Verification IP modeling , eRM , Incisive Enterprise Simulator (IES) , IES

Verification

Quickly Create and Manage e Functional Coverage

As a verification engineer, I have always found creating coverage code to be one…

• 3 min read
IEEE 1647 , Specman , Verification methodology , metric driven verification (MDV) , Functional Verification , MDV techtorial , Coverage-Driven Verification , CDV , e , Enterprise Manager , Enterprise Planner , coverage driven verification (CDV)

System, PCB, & Package Design 

Thank You!

As the 2008 year comes to a close, I wanted to say Thank You! Thanks to the hard…

• 1 min read
PCB design

Verification

Video Demo: “irun” – The Way to run Simulations!

The irun utility provides a use-model to run simulations with Incisive Simulator…

• less than a min read
Functional Verification , Incisive Enterprise Simulator (IES)

System, PCB, & Package Design 

What's Good About the SPB16.2 PSpice Models? BSIM4 Support!

The SPB16.2 release now has new MOSFET device Model BSIM4 Support in PSpice PSpice…

• 4 min read
RF , SPB 16.2 , PCB design , BSIM4 , MOSFET

Verification

Is it Necessary to Improve the Quality of Consumer Electronics?

Fellow blogger Joe Hupcey passed along a link covering the recent launch of the BlackBerry…

• 4 min read
System Design and Verification , software acceleration , blackberry , Enterprise Manager , ISX

Verification

Constraint Layering - Fine Tuning Your Environment - Part 2

In my last post , I talked briefly about constraint layering in which I gave an extremely…

• 4 min read
IEEE 1647 , Specman , verification strategy , Verification methodology , Functional Verification , Testbench simulation , e , Aspect Oriented Programming , IES , AOP

Analog/Custom Design

Video Chat with Lead Architect of Virtuoso Accelerated Parallel Simulator

Virtuoso Accelerated Parallel Simulator was just released and I asked Ilya Yusim…

• 1 min read
mixed-signal simulators , MMSIM , Circuit Design , Simulators , Custom IC Design , custom design technology

Digital Design

Become an Encounter Digital Implementation System Specialist and Win Cool Prizes

Last week, we announced the Encounter Digital Implementation System along with a…

• less than a min read

Verification

New Technical Blog on e & Specman Technology

Specmaniacs of the world: rejoice! Members of Team Specman have just launched their…

• less than a min read
IEEE 1647 , Specman , e

Verification

Constraint layering - Fine Tuning Your Environment - Part 1

In today's environment of ever growing complexity and ever shrinking schedules,…

• 3 min read
IEEE 1647 , SystemVerilog , Specman , verification strategy , Verification methodology , Object Oriented Programming , Functional Verification , e , OOP , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

Verification

New e / Specman Workshops Available Now

In response to the continual growth in the e /Specman user community, Team Specman…

• 2 min read
workshops , IEEE 1647 , Specman , metric driven verification (MDV) , Functional Verification , Testbench simulation , MDV techtorial , OVM e , Coverage-Driven Verification , e , Kit , coverage driven verification (CDV) , eRM , IES

Verification

New Blog - All About e & Specman

End-users of e , Specman, Incisive Enterprise Simulator (IES), e RM/OVM e , and…

• 1 min read
IEEE 1647 , Specman , verification strategy , metric driven verification (MDV) , Functional Verification , Testbench simulation , OVM e , Coverage-Driven Verification , e , coverage driven verification (CDV) , eRM , Incisive Enterprise Simulator (IES) , IES

System, PCB, & Package Design 

What's Good About SPB16.2 OrCAD Capture? Many Usability Enhancements!

There are enormous usability updates in the SPB16.2 release of OrCAD Capture. From…

• 7 min read
SPB 16.2 , OrCAD , PCB design
CDNS - Fix Layout Hompage