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Breakfast Bytes: Update: Hogan, Mars, Australia, Solarwinds

Paul McLellan

I don't normally do these updates this frequently, and never before have I produced an update on a post from just a week ago. Jim Hogan RIP One of my mentors passed over the weekend from a heart attack. Jim was one of the earliest employees of SDA, ...
- 1 Mar 2021
RF /マイクロ波設計: お客様発表『 Fast MMIC Design with Distributed EM Analysis』のご案内

RF Design Japan

概要回路および電磁界（EM）解析を単一のコンピュータ上の複数のプロセッサ間または外部のリモートコンピューティングファーム全体に分散する機能により、リソースを大量に消費するMMIC、RFIC、およびファブリック間の設計問題の全体的な解析時間を大幅に短縮できます。並列計算を活用することで、設計チームはEMレベルの精度でオンチップ部品の値を容易に最適化し、数千とは言わないまでも数百回の最適化の反復を通じて設計オプションを完全に調査し、大規模システム（チップ、パッケージ、ボードアセンブリ）の性能を検...
- 28 Feb 2021
PCB設計／ICパッケージ設計: BoardSurfers: 17.4-2019に追加されたダイナミックシェイプの 'Fast' モードは本当に早い！

SPB Japan

私は Allegro® PCB design のソフトウェアのテストを20年間担当していますが、あごがはずれるほどびっくりする機能をテストすることが時々あります。今年、新しいFast シェイプモードについて私はそんな驚きを体験し、これは皆さんに伝えなくては、と感じました。なぜなら、ポジティブシェイプを扱う作業を大きく変える、パフォーマンスとシェイプ表示クォリティの両面において画期的な機能だからです。エッチシェイプの数が増え、あるいはポジティブシェイプの増加に伴ってデータベースが肥大化す...
- 28 Feb 2021
Verification: Webinar: Extend the Language Using Specman e Macros!

teamspecman

Using Cadence^® Specman^® Elite macros lets you extend the e language ─ i.e. invent your own syntax.

Today, every verification environment contains multiple macros. Some are simple “syntax sugaring” and some are very advanced utilities implementing sophisticated methodologies. With macros, you can replace long complex user code with much shorter and simpler code. And, as we know – the shorter the code is, the less…
- 28 Feb 2021
Breakfast Bytes: Sunday Brunch Video for 28th February 2021

Paul McLellan

https://youtu.be/6wgF8p76x5g Made my personal cloud datacenter Monday: Arm/Cadence on Implementing Advanced Microprocessors in Advanced Processes Tuesday: The Death of Distance Wednesday: The OpenAccess Story Thursday: JAWS: JasperGold in the AW...
- 28 Feb 2021
Analog/Custom Design: Spectre Tech Tips: Introducing Spectre XDP-HB (Distributed HB)

Huiling Xiao

Spectre XDP-HB was released in the SPECTRE 20.1 base release as part of the new Spectre X-RF simulation technology. Spectre XDP-HB uses a highly distributed multi-machine multi-core simulation technology to perform HB and HB small-signal analyses. In this blog, we introduce the Spectre XDP-HB technology.
- 26 Feb 2021
System, PCB, & Package Design : (P)SpiceItUp: Simulation Profiles in Five Steps

mrigashira

After completing a circuit, it’s time to run simulations. The first step is to define a simulation profile. A simulation profile controls which analysis is run and what resources are to be used, for example, the models which define the parts fo...
- 26 Feb 2021
Analog/Custom Design: Virtuosity: Design, Plan, and Analysis - The 3 Sides Of A Coin, Episode 2

colint

Design, Plan, and Analysis - read why it is important to keep these 3 sides of a coin together and how the Virtuoso Design Planning and Analysis tool can help you with this.
- 26 Feb 2021
Breakfast Bytes: Liberate Trio on AWS/Graviton2 Instances

Paul McLellan

This is a sort of continuation of yesterday's post JAWS: JasperGold in the AWS Cloud. It takes a look at the use of the Liberate Trio Characterization Suite on AWS, but this time on Arm-based Graviton2 instances. There was a recent Cadence/Arm C...
- 26 Feb 2021
カスタムIC／ミックスシグナル: Virtuoso Video Diary: Performance Diagnostic ツール – VirtuosoのMRIスキャナ

Custom IC Japan

この間、私の母は膝の耐え難い痛みに苦しみ、私たちは医者を訪ねることを余儀なくされました。その痛みは外傷によるものではないため、原因を特定できませんでした。それでも、X線を撮って骨折や靭帯の損傷がないことを確認しました。医者は母にいくつかの鎮静剤を処方し、私たちを帰しました。鎮静剤はしばらく効きましたが、痛みが戻ってきたため、またクリニックに行きました。今度は、MRIを撮り、その他のいくつかのテストを行って、最終的に痛みの背後にある本当の原因を診断することができました。正しい治療により、母は健康...
- 25 Feb 2021
Life at Cadence: My Life at Cadence: Aspa Karanasiou

Laura Charabot

At Cadence, we pride ourselves on creating and sustaining a company culture, that drives innovation and business success. To continue our series of EMEA team members’ interviews, we spoke with Aspa Karanasiou, Senior Application Engineer based ...
- 25 Feb 2021
Breakfast Bytes: JAWS: JasperGold in the AWS Cloud

Paul McLellan

At the CadenceCONNECT Jasper User Group meeting in December, one of the presentations was by Richard Paw of AWS on a Cadence/AWS project called JAWS, for JasperGold on AWS. I covered it in the second half of my presentation Jasper User Group: The Sta...
- 25 Feb 2021
RF /マイクロ波設計: μWaveRiders:AWR VSSソフトウェアを使用したミックスドシグナルRFシステムの解析

RF Design Japan

チームRFの "μWaveRiders" ブログシリーズは、Cadence AWR RF製品のショーケースとしてデビューします。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。このシリーズの新しいブログに関する通知を受け取るために、Subscri...
- 25 Feb 2021
Analog/Custom Design: Virtuoso Meets Maxwell: Virtuoso RF Solution—The Flow Revolution Enters the Next Level

Claudia Roesch

In many ways 2020 was an exceptional year with extraordinary challenges for all of us. Despite the unusual circumstances of a global pandemic, it was an exciting year with lot of product innovation that lies behind. To start with the Virtuoso Meets Maxwell series in 2021, let’s take a moment to look back at what we have achieved since the inception of the Virtuoso RF Solution.
- 24 Feb 2021
定制IC芯片设计 : Virtuoso Meets Maxwell: EM 全视图提取功能

jgrad

摘要：本博客介绍了Virtuoso RF 解决方案的全视图（full cellview）提取功能，允许用户提取一个完整布局视图的3D S参数模型用。欲知更多，请继续阅读
- 24 Feb 2021
Breakfast Bytes: The OpenAccess Story

Paul McLellan

When I worked for Cadence back in the early oughts, we developed a layout database called OpenAccess, usually abbreviated to OA. It had actually been designed from the ground up to be the native database that would underlay Cadence's physica...
- 24 Feb 2021
RF Engineering: μWaveRiders: Simulating Mixed-Signal RF Systems with AWR VSS Software

TeamAWR

This blog highlights the types of RF systems that AWR Visual System Simulator (VSS) communications and radar systems design software aids in analyzing. Future blogs in this series will include details on time-domain vs. frequency domain analysis, digital signal processing, and RF budget analysis capabilities within AWR VSS software.
- 24 Feb 2021
Life at Cadence: Black History Month 2021: Become the Change Agents Our World Needs

Johnas Street

While February is Black History Month, we should also take the other 11 months to focus on the future—one that is inclusive and promotes equity and equality. Unfortunately, the Black community is still working hard to remedy what happened in pa...
- 23 Feb 2021
The India Circuit: Mohammad Mujamil: A Story of Hard Work and Fortitude

Asim Khan

Subsequent to my previous blog about the Cadence Scholarship Program, I bring to you another inspiring story featuring one of our students - Mohammad Mujamil. Meet Mohammad Mujamil Growing up with poverty always at the door, struggling...
- 23 Feb 2021
Breakfast Bytes: The Death of Distance

Paul McLellan

You may have seen the news that if you read an interesting article in the Australian press, you cannot share it with your friends on Facebook. Say what? Cable TV Let's start with a bit of history. There is probably some similar story to this base...
- 23 Feb 2021
RF /マイクロ波設計: 新しいミリ波MIMOレーダーシステムの設計

RF Design Japan

レーダーは、反射した電波を使用して、物体の距離、角度、または速度を決定します。かつては航空宇宙および防衛産業の独占的な領域であったこれらの検出システムは、現在、消費者産業、特に自動車レーダーで人気を集めています[1]。部分的には、シリコンゲルマニウム（SiGe）やCMOS技術などの大量の半導体プロセスにより、大量の商用アプリケーション向けの費用効果の高いシステムが可能になっているため、商用採用が可能です。このブログでは、商用レーダーアプリケーション向けの60GHz周波数変調連続波（FMCW）...
- 22 Feb 2021
RF Engineering: Design of a Novel mmWave MIMO Radar System

TeamAWR

Radar uses reflected radio waves to determine the range, angle, or velocity of objects. These detection systems that were once the exclusive domain of the aerospace and defense industry are now gaining popularity in the consumer industry, most notably automotive radar. Commercial adoption is possible, in part, because of high-volume semiconductor processes such as silicon germanium (SiGe) and complementary metal-oxide…
- 22 Feb 2021
Breakfast Bytes: Arm/Cadence on Implementing Advanced Microprocessors in Advanced Processes

Paul McLellan

Late in January, Cadence and Arm ran a joint webinar on implementing advanced microprocessors in advanced processes using the digital full flow for implementation and signoff. The opening presentation was by Arm's Dermot O'Driscoll. Then Yufeng Luo p...
- 22 Feb 2021
Verification: Taking LPDDR5 to the Next Level

Shyam Sharma

To cater to ever-increasing bandwidth demands from low-power DRAMs especially for devices like cell phones, tablets and others with limited power budgets, JEDEC has extended the clock frequencies supported by its latest low power memory offering LPDDR5 to include the 937MHz and 1066MHz that translates to the max data rates of 7500MT/s and 8533 MT/s.

Devices supporting these incredibly high data rates are being categorized…
- 19 Feb 2021
Verification: DisplayPort 128b/132b Concurrent LTTPR Link Training

tfox

Before a video frame can be sent, the Source (DP-TX) must complete link training (LT) with the downstream devices. DisplayPort (DP) version 2.0 specification mandates support for a 128b/132b link layer and non-transparent Link Training-Tunable PHY Repeater (LTTPR) device when connected.

The diagram below shows the connection between the source, LTTPRs, and sink devices. The specification allows up to eight LTTPRs. The…
- 19 Feb 2021

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