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定制IC芯片设计 : Virtuosity：自动设备放置和路由 - 识别设备组和拓扑

Sravasti

正如所承诺的，这是我在Virtuoso Automated Device-Level Placement and Routing系列博客中的下一篇博客。在我之前的post中，我谈到了在模拟和完全自定义空间中需要完全Automated Device-Level Placement and Routing解决方案。在本博客中，我将深入探讨此过程中的一个重要步骤 -识别用于placement和routing的device groups和topologies。
- 30 Oct 2019
定制IC芯片设计 : Virtuosity：在Virtuoso中引入Automated Device Placement and Routing

Sravasti

ICADVM18.1通过推出面向advanced nodes的Fully Automated Device-Level Placement and Routing Solution ，并与代表性工艺厂商的行业领导者合作开发，更加引人注目。在本系列的即将发布的帖子中，我们将介绍此流程的每个步骤。
- 30 Oct 2019
Breakfast Bytes: Photonics Summit and Workshop 2019

Paul McLellan

Once again Cadence and Lumerical are hosting the two-day Photonics Summit and Workshop. The two events are not interdependent, you can attend either or both. However, they do have a common theme: The Convergence of RF and Photonics. 5G, and espe...
- 29 Oct 2019
SoC and IP: PCI-SIG DevCon 2019 APAC Tour: All Around Latest Spec Updates and Solution Offering

William Chen

PCI-SIG DevCon 2019 APAC tour has come to Tokyo and Taipei this year. The focus is predominantly around the latest updates for PCIe Gen 5 which its version 1.0 specification was just released this year in May. A series of presentations provided by PCI-SIG on the day 1 with comprehensive information covering all aspects of Gen 5 specification, including protocol, logical, electrical, compliance updates. On the day 2 (only…
- 29 Oct 2019
System, PCB, & Package Design : BoardSurfers: Going Beyond Just Correct - Improving and Optimizing Design and Routing

mrigashira

PCB layout editors provide many checks in the form of constraints and rules to ensure your design is correct. You even have the DFM rules to prevent fabrication or manufacturing issues. Then you have automatic routing to ensure an errorless board with the right connections and traces. But are you satisfied only with 'just a correct' board? Or, do you want to optimize it further? And what about 'quality'?
- 28 Oct 2019
Breakfast Bytes: Level-4 Autonomous Trucks Are on the Road Already

Paul McLellan

I already wrote two posts about the recent automotive day at the Computer History Museum, Silicon Valley Reinvents the Wheel and The California DMV on Autonomy. Today it is the turn of trucks. Given that a truck costs about $200-2...
- 28 Oct 2019
PCB、IC封装：设计与仿真分析: 专家访谈：多板PCB系统设计新思路

Sigrity

本文转载自Semiwiki.com。许多电子产品的创意都是从草图开始，然后在Visio或PowerPoint中绘制图表，最后再进入特定的EDA工具中进行设计。但是，这种方法使得纯图形工具绘制的图与EDA工具的设计之间存在很大的脱节，由于没有发生数据链接，所以在规范进行了更改后无法实现一致性和自动化。需求是前进的动力，Cadence® Allegro® System Capture工具可将对PCB系统级设计的需求转化为现实功能，不妨请 Cadence的Gary Hinde来为大家...
- 25 Oct 2019
Breakfast Bytes: The California DMV on Autonomous Cars

Paul McLellan

Earlier in the week I gave an overview of Silicon Valley Reinvents the Wheel. That was largely about the factors that would make autonomous vehicle manufacturers successful, and how accepting the general public are of the technology. But here in Cali...
- 25 Oct 2019
定制IC芯片设计 : Virtuosity：在Modgen中支持堆叠式设备

Aneesh Shastry

该博客概述了Modgen中对堆叠设备的支持。此功能使您可以轻松地在高度复杂的设计中可视化和编辑设备，从而有助于在高级节点PDKs中实现更高的电路性能目标。阅读博客文章，以了解有关如何在Modgen中使用堆叠式设备的更多信息。
- 24 Oct 2019
Life at Cadence: A Tale from Two Cities: Hear from Two Cadence Interns

Ashley Sneathen

Here at Cadence, we welcome students from universities around the world to any number of our 20+ campuses globally. Joining teams across all solutions and services throughout the company, these talented, helpful interns jump in to immediately work on...
- 24 Oct 2019
Breakfast Bytes: 40 Years Ago, "Spreadsheet" Didn't Mean Excel, It Meant VisiCalc

Paul McLellan

I like to find specific events that change the trajectory of the semiconductor industry, such as June 29, 2007, when the iPhone was announced. Today is the 40th anniversary of another such event. Forty years ago today, on October 24, 1979, Dan B...
- 24 Oct 2019
Breakfast Bytes: Silicon Valley Reinvents the Wheel

Paul McLellan

Recently the Western Automotive Journalists, or WAJ (I had no idea that was a thing), held their annual Silicon Valley Reinvents the Wheel event at the Computer History Museum in Mountain View. Outside in the parking lot was a broad selection of auto...
- 23 Oct 2019
Analog/Custom Design: Virtuoso Video Diary: Technology File Maintenance Made Easy

Uma Peethambaran

The Virtuoso Techfile IDE offers a powerful and modern interface to easily create and modify ASCII technology files.
- 23 Oct 2019
Analog/Custom Design: Virtuoso IC6.1.8 ISR7 and ICADVM18.1 ISR7 Now Available

Virtuoso Release Team

The IC6.1.8 ISR7 and ICADVM18.1 ISR7 production releases are now available for download.
- 22 Oct 2019
System, PCB, & Package Design : IC Packagers: Manage Your Outside Data Sources in One Place

Tyler

Every package design has data sources. Die data you receive from the IC design team as they send you updated die text files and co-design die abstracts. Your downstream PCB design team may send an updated ball map spreadsheet with change requests. Obviously, your front-end schematic engineer will be pushing you updated netlist information. How do you keep track of when the last time was that you imported data from a…
- 22 Oct 2019
Breakfast Bytes: Arm TechCon: A Look at 2020 and 2030

Paul McLellan

The last day of Arm TechCon opened with the return to the event of Charlie Miller. I already covered that in my post Charlie Miller: Stopping Cars Being Hacked Instead of Hacking Them. For my first post about Arm TechCon this year, see my post Arm Te...
- 22 Oct 2019
Analog/Custom Design: Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part II

Kabir

This is the second blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. For some useful guidelines on selecting geometries for electromagnetic analysis, read
- 21 Oct 2019
Breakfast Bytes: EDPS 2019: Efficient Design and Manufacturing

Paul McLellan

EDPS, the Electronic Design Process Symposium, took place on October 3 and 4 at SEMI HQ in Milpitas. The theme was Efficient Design and Manufacturing. Camille Kokozaki The meeting opened with a moment of silence for Camille Kokozaki, who had helped ...
- 21 Oct 2019
PCB、IC封装：设计与仿真分析: 如何创建最佳PCB叠层

TeamAllegro

当进行装修时，我们会发现选择材料时最好要咨询专家或者有经验的人。举例来说，也许装修类杂志推荐了一种非常昂贵的屋顶材料，但是当我们到当地的家装店询问后，发现当地的气候根本不需要这种极其耐用坚固的材料，普通材料即可满足我们的需求。在电路板设计上创建PCB叠层也会遇到类似情况：我们可能不了解最适宜的PCB材料，也不知道如何有效地构建叠层。在作出决定之前，清楚了解我们的需求才能对设计最为有利。优化设计意味着梳理可供考虑和选择的众多变量。本文将讨论如何确定哪些PCB叠层信息需要了解的方式方法。 01....
- 18 Oct 2019
定制IC芯片设计 : Spectre 技术小窍门：器件老化？是的，即使是硅也会失效

Meilin Zhang

作者：Moustafa Moham 虽然我们大多数人都希望我们的电子产品永远工作，但事实是这些产品有生命周期。大多数情况下，器件的寿命受到机械（开关，继电器）或热（熔断器，电容器）故障的限制。然而，随着先进工艺设计的微芯片变得越来越常见，微芯片的寿命成为另一个问题。几种效应会导致器件老化。某些影响，如电迁移和Time-Dependent Dielectric Breakdown (TDDB)会导致突然故障，而其他影响，如Hot Carrier injection (HCI)和Bias Temp...
- 18 Oct 2019
定制IC芯片设计 : Spectre 技术小窍门：如何使用 Spectre APS 在 ADE 中执行 EMIR 分析？

Meilin Zhang

作者：Stefan Wuensche Spectre 技术小窍门是一个博客系列，旨在探索 Spectre® 的功能和潜力。除了深入了解 Spectre 的有用功能和优化改进之外，本系列还传播不同博主和专家的声音，他们将分享他们在与Spectre 相关的所有事情上的知识和经验。本系列的第一篇博客将指导您完成使用 Spectre APS 在 ADE 中执行 EMIR 分析所需的步骤。作为模拟或混合信号设计人员，您将在Virtuoso® Analog Design Environme...
- 18 Oct 2019
Breakfast Bytes: Book: VLSI Design Methodology Development

Paul McLellan

There are lots of books on EDA, but many of them are academic texts about the algorithms used inside EDA tools. Rather fewer of them are written for people doing real designs. A recently published book firmly targeted at the practical needs of ...
- 18 Oct 2019
Analog/Custom Design: Virtuosity Webinar: Achieving Layout Success with Custom Design Planner and Design Intent - October 29, 2019

sarahfino

Enhance productivity with Design Planner and Design Intent. Attend our FREE one-hour webinar with Baby Ravi and Bill Cambouris on Tuesday, 29 October 2019.
- 18 Oct 2019
SoC and IP: Did You “Stress Test” Yet? Essential Step to Ensure a Quality PCIe 4.0 Product

William Chen

The PCI-SIG finalized the PCIe 4.0 specification with doubling the data to 16GT/s from 8GT/s in PCIe 3.0 in 2017. Products implementing this technology have begun to hit the market in 2019. Earlier this year, AMD announced it X570 chipset would support the PCIe 4.0 interface and Phison also introduced the world’s first PCIe 4.0 SSD. With the increasing companies are working on PCIe 4.0 related product development…
- 17 Oct 2019
Breakfast Bytes: Samsung: In SAFE Hands

Paul McLellan

Today is Samsung's SAFE Forum 2019 at their Samsung@First building on San Jose's First Street. SAFE stands for Samsung Advanced Foundry Ecosystem. Since Samsung Foundry really only has two events per year, the other being the Samsung F...
- 17 Oct 2019

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