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Latest Blog Posts

  • Breakfast Bytes: Amazon Go: Just Walk Out Shopping

    Paul McLellan
    Paul McLellan
    Last year you probably heard about Amazon Go when it opened in Seattle. This is a store where you install an App on your smartphone, go to the store, use a barcode the App shows to open the turnstile to get into the store, just take what you want off...
    • 25 Jan 2019
  • Analog/Custom Design: Spectre Tech Tips: Optimizing Spectre APS Performance

    Stefan Wuensche
    Stefan Wuensche
    This blog discusses how to optimize the Spectre APS performance for analog and mixed-signal designs. It introduces the key options for adjusting simulation accuracy and performance, provides solutions for typical setup problems causing performance issues, and delivers tips on advanced methods for optimizing simulation performance.
    • 24 Jan 2019
  • Breakfast Bytes: "The First Half of 2019 Is Likely to Be Really Bad"

    Paul McLellan
    Paul McLellan
    The title of this post was the single line summary of Dan Niles' quarterly outlook for the semiconductor industry. Dan is the founder and portfolio manager of AlphaOne NexGen Technology Fund. Each quarter GSA has a conference call with him where ...
    • 24 Jan 2019
  • Breakfast Bytes: Why the Nation That Invented the Computer Lost Its Lead

    Paul McLellan
    Paul McLellan
    Last month I wrote about a piece that Lynn Conway wrote for IEEE Computer Magazine. (See my post The Conway Disappearance Effect.) I came across another article in the same issue, When Winning Is Losing: Why the Nation that Invented the Computer Lost...
    • 23 Jan 2019
  • Breakfast Bytes: DesignCon: The Integrity Show

    Paul McLellan
    Paul McLellan
    It's the end of January and that means DesignCon. It is January 29th to 31st in the Santa Clara Convention Center. Increasingly, the design of high-end PCBs is all about integrity: signal integrity, power integrity, EM integrity, thermal integrity. F...
    • 22 Jan 2019
  • The India Circuit: A Boost For Fabless Chip Design in India

    Madhavi Rao
    Madhavi Rao
    There was a lot of excitement when the National Policy on Electronics was announced in 2012. However, in the six years that it has been in existence, it has not proven to be very effective in its aim of stemming the outflow of foreign exchange for el...
    • 21 Jan 2019
  • Breakfast Bytes: Sunday Brunch Video for 20th January 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/Bs5A09med6Q Made at the Cadence campus in the rain (camera Sean) Monday: Tensilica at CES Tuesday: AMD Keynote at CES Wednesday: AlphaZero: Four Hours to World Class from a Standing Start Thursday: IEDM: EUV, the Road to HV...
    • 20 Jan 2019
  • PCB、IC封装:设计与仿真分析: 了解DDR5技术之前需要知道什么是AMI与IBIS

    Sigrity
    Sigrity
    本文翻译自Cadence "Breakfast Bytes"专栏作者Paul McLellan文章" AMI and IBIS: Who Put the Eye in AMI?"。 space 在SerDes设计领域,IBIS和AMI是对SerDes通道进行建模的方式,可以在保证设计性能的前提下,确保信号成功地在不同芯片之间进行传输。当下,我们的行业正面临着巨大的变化,IBIS和AMI的含义需要被更多设计领域的人了解。DFE均衡(判决反馈均衡)即将被规定包含在DDR5标准之内, 这将需要运用IB...
    • 18 Jan 2019
  • Breakfast Bytes: MLK Off-topic: The Lady with the Polar Chart

    Paul McLellan
    Paul McLellan
    It's Martin Luther King day on Monday, and Cadence is off. I think that this is the first time I have ever got it as a holiday, rather than moving it to somewhere like July 3rd. Breakfast Bytes will not appear on Monday. So, as is traditional, th...
    • 18 Jan 2019
  • System, PCB, & Package Design : Cadence Sigrity at DesignCon 2019

    Sigrity
    Sigrity
    Happy new year!  We want to invite you to visit us in booth 711 on the DesignCon Expo floor.  Learn about how we can address your design challenges with Cadence® Sigrity signal integrity and power integrity tools, multi-gigabit SerDes...
    • 17 Jan 2019
  • Analog/Custom Design: Virtuosity: What's New in Run Plan – Part III

    Priyanka Dadwal
    Priyanka Dadwal
    After two interesting blogs by Yagya Mishra that explained the most popular features of the Run Plan assistant in Virtuoso ADE Assembler , I am writing this third blog in the series to share with you the latest features introduced in the IC6.1.8 and ICADVM18.1 releases.
    • 17 Jan 2019
  • 定制IC芯片设计 : Virtuoso视频日记:这根线是怎样连接的?

    sarahfino
    sarahfino
    Virtuoso Schematic Editor L 的Probes工具是连接辅助工具,能满足您识别已存在的连接关系,过滤这些连接关系,并且将探测路径信息存为CSV文件。
    • 17 Jan 2019
  • Breakfast Bytes: IEDM: EUV, the Road to HVM and Beyond

    Paul McLellan
    Paul McLellan
    At IEDM in December, the Sunday preceding the conference proper consists of two short courses, traditionally one logic-related and one memory-related. I always attend the logic one, since that is the most relevant to EDA and the broad semiconductor i...
    • 17 Jan 2019
  • Breakfast Bytes: AlphaZero: Four Hours to World Class from a Standing Start

    Paul McLellan
    Paul McLellan
    Last year I wrote about AlphaZero in my post Deep Blue, AlphaGo, and AlphaZero. A quick recap to jog your memory, or read that earlier post for more detail. Deep Blue was the program developed by IBM that defeated Gary Kasparov at chess in 1997, at t...
    • 16 Jan 2019
  • System, PCB, & Package Design : DesignCon 2019: Is this the Year?

    BillAcito
    BillAcito
    2019 has started --- is this the year of advanced packaging, where system design enablement shifts to the package? If you are attending DesignCon (designcon.com) in Santa Clara, California, in a few weeks, there’s a robust agenda, and it might ...
    • 15 Jan 2019
  • Verification: Verification of ML IP and Specman—Our Hackathon Project

    teamspecman
    teamspecman

    If you are lucky enough and your company spends a few working days each year on a Hackathon, you must know that it is usually a lot of fun. The latest 2018 Hackathon in Cadence was all about Machine Learning. We, in Specman R&D, debated a bit around how to approach the topic since Machine Learning means a lot of different things in our industry. Take a look at the following interesting article: Where ML works bes…

    • 15 Jan 2019
  • Breakfast Bytes: AMD Keynote at CES

    Paul McLellan
    Paul McLellan
    As I said in my post about CES last week (see my post Consumer Electronics: 5G, AI, and Air Taxis), I'm not sure if can read anything into it but the "semiconductor" keynote was given by AMD and not, as historically been the case, Intel...
    • 15 Jan 2019
  • Breakfast Bytes: Tensilica at CES

    Paul McLellan
    Paul McLellan
    Tensilica has been attending CES for many years, before it was acquired by Cadence. The focus used to be on audio processing, with the HiFi family of processors. In fact, as I said in my preview post for this year's CES (see CES Preview), we now...
    • 14 Jan 2019
  • Analog/Custom Design: Accurate Pin-to-Pin Resistance Modeling for Wide, Slotted Metal Structures Using Advanced Adaptive Mesh Extraction Technology in Quantus

    Shritam
    Shritam

    In Analog/RF layouts, designers frequently use slotted metal structures. Such slotting is done either to satisfy DRC requirements from foundries to satisfy max. density rule criteria, or to reduce eddy current losses in return paths of a transmission line/coiled spiral inductor. Current flow in such slotted metal structures is non-uniform, hence, traditional parasitic extraction approaches with predefined fracture length…

    • 11 Jan 2019
  • Breakfast Bytes: Gordon Moore Killed the Oakland Tribune

    Paul McLellan
    Paul McLellan
    The Oakland Tribune closed down in 2016. It remains to be seen if the San Jose Mercury or the San Francisco Chronicle follows. There are lots of plausible stories as to why this happened. I think two of the most significant are Craigslist, and t...
    • 11 Jan 2019
  • Breakfast Bytes: Consumer Electronics: 5G, AI, and Air Taxis

    Paul McLellan
    Paul McLellan
    I'm sure you've heard the great marketing catchphrase that "What happens in Vegas, stays in Vegas." Well, this week it is the Consumer Electronics Show, better known by its initials, CES. About 4,000 exhibitors are hoping that ...
    • 10 Jan 2019
  • Analog/Custom Design: Virtuosity: Saving Time, Effort, and Money with Express Pcells

    Pallabi R
    Pallabi R
    Use the Express Pcell feature and see for yourself how you can save time, effort, and money!
    • 10 Jan 2019
  • Breakfast Bytes: SiFive: The Magnificent Seven

    Paul McLellan
    Paul McLellan
    At least for now, I think that the most significant of the RISC-V processor companies is SiFive. There are two reasons for this: they started first, and they are an IP licensing company (as well as a chip company), not someone creating an implementat...
    • 9 Jan 2019
  • Breakfast Bytes: Breakfast Nibbles: Predictions for 2019

    Paul McLellan
    Paul McLellan
    It is the start of the year, so time to provide my predictions for 2019. These are the topics that I expect I will spend a lot of time writing about this year. Let's start with the big picture, and work down to the small (do we call it a 30&Aring...
    • 8 Jan 2019
  • Breakfast Bytes: 2018: A Year of Breakfasts

    Paul McLellan
    Paul McLellan
    It's the start of a new year. Tomorrow, I'll pick out what I think that the big trends for 2019 are going to be. But today, let's take a look at how my predictions for 2018 fared from my post Nibbles: Breakfast Bytes Predictions for 2018....
    • 7 Jan 2019
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