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System, PCB, & Package Design : System Analysis Knowledge Bytes: Tips for Accelerating Power Signoff in Chip-package Co-analysis Using Sigrity XtractIM

Sanyukta

This blog discusses PLOC grouping optimization which provides the flexibility in the way you define the port groups. Thus, accelerating the time required for signoff and allowing you to run simulations efficiently on modestly equipped computers.
- 7 Feb 2022
The India Circuit: Mentor Story: Roli Sinha - Cadence Scholarship Program

Asim Khan

Introduced five years ago, the Cadence Scholarship Program is the flagship CSR program of Cadence India. Many meritorious students from under-served sections of society drop out of the education system after school because of the lack of finances. Th...
- 6 Feb 2022
Computational Fluid Dynamics: This Week in CFD

John Chawner

As my friend Brian says, "Something weekend this way comes." But first, it's time for This Week in CFD. What makes me feel good about this week's news is the large number of events planned to be held in-person. It will be nice to st...
- 4 Feb 2022
Verification: Re-Timer – The Key for High-Speed Signal Transmission in USB4 Systems

Neelabh

The objective of USB4 protocol to achieve high speed signal transmission and thereby providing high data bandwidths for protocol tunneling would not have been possible without USB4 re-timer. Like several other serial protocols where the generation-by-generation higher link speeds are being targeted, USB4 system too needs re-timers, whether On-board or in Active cables, to support 40Gbps link speed.

Re-timers are protocol…
- 3 Feb 2022
System, PCB, & Package Design : ASCENT: 3 Reasons to Use Live BOM for Your Bill of Materials

Auromala

A product is only as good as its components, which makes selecting good components vital. So how does one select the right component? And let’s think about what 'right' means. You have to consider the availability and lead time, the pri...
- 3 Feb 2022
PCB、IC封装：设计与仿真分析: PCB 的 DDR4 布线指南和 PCB的架构改进

TeamAllegro

计算机领域总是在持续不断地进步，始终有发展变化和更新迭代等待着我们去体验和探索。从头开始打造一台新的 PC 是一种令人愉悦的体验，有新一代标准时更是如此。说到这里，我们不得不提到有关随机存取存储器 (RAM) 的话题。具体来说是 DDR4 RAM，这恰好是市场上目前的标准。RAM 的重要性众所周知，如果我们问到任何计算机或网络工程师，他们都会表示拥有再多的 RAM 也不为过。基于 DDR4 实现的 PCB 架构改进如前文所述，计算机技术领域的格局不断发展变化。随着新标准的出现，设备架构需要...
- 1 Feb 2022
Academic Network: Introducing DATE 2022 Young People Program

Anton Klotz

The DATE conference, the biggest EDA conference in Europe will find place 14-23.03.2022, as virtual event. The Young People Program (YPP) at DATE conference is an initiative targeting PhD students with the goal of supporting their career development....
- 1 Feb 2022
The India Circuit: DVCON India 2021 - A Quick Summary

lokesh123

Another DVCon India, the ‘Mecca’ for Design and Verification Engineers, took place from December 14-16, 2021. The theme of this virtual event was on the convergence of AI, 5G and edge computing. DVCon India always provides a superior lea...
- 31 Jan 2022
Life at Cadence: Attain Functional Safety with the Midas Safety Platform

Vinod Khera

The rapid increase in innovations such as ADAS, lidar, radar, and automation has led to the proliferation of electronics/semiconductors in cars. With the evolution of hybrid/electric vehicles (EVs), these are expected to reach more than 75% of ...
- 31 Jan 2022
Analog/Custom Design: Spectre Tech Tips: Spectre Voltage Domain Check

Stefan Wuensche

This blog introduces you to the static voltage domain check in the Spectre circuit simulator.
- 31 Jan 2022
Computational Fluid Dynamics: February Is the Month for CFD Webinars - Register Today

John Chawner

In place of This Week in CFD (gotta pay them bills) I shared today overviews of the three—count 'em, THREE—CFD webinars coming up next month. They cover aerospace and automotive applications, mesh generation, geometry model preparatio...
- 28 Jan 2022
Life at Cadence: Functional Safety Solutions - How Hailo Ensured ISO 26262 ASIL-B (D) Compliance for Their AI Processor

fschirrmeister

Safety is critically important across the automotive, industrial, and aerospace and defense industries. For instance, Cadence's work with Hailo illustrates how advances in semiconductor technology and EDA deliver safe electronics without compromi...
- 28 Jan 2022
System, PCB, & Package Design : ASCENT: Training Insights: Connecting System Architecture Design and Implementation

Rachna2018

Today we take a break from our regular posts on Allegro System Capture features and basics to announce a Cadence Training webinar on System-Level Design with Senior Application Engineer, Dave Palumbo. What Is this Webinar About? In the produ...
- 28 Jan 2022
RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environment の高度なカスタマイズのヒントとコツ

RF Design Japan

　Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。 AWRソフトウェアのヒントとコツ: AWR Design Environmen...
- 27 Jan 2022
RF Engineering: μWaveRiders: Cadence AWR Design Environment Advanced Customization Tips & Tricks

TeamAWR

The AWR Design Environment is highly customizable. Advanced customization options include using scripts to automate repetitive tasks and create custom parts libraries, creating custom symbols for subcircuits, and using parameterized layout cells.
- 27 Jan 2022
Digital Design: Is your Compression Technique Unified? Wanna Explore?

Neha Joshi

Scan compression is critical for addressing the rapid rise of test costs without sacrificing coverage requirements. Although it has been widely adopted, it has its limitations. In today's era demand is not just high coverage but also the ability to verify that the design is working in the field.

A unified compression is an approach that unifies scan compression and logic built-in self-test (LBIST). It leverages physically…
- 26 Jan 2022
System, PCB, & Package Design : BoardSurfers: An Introduction to Dimensioning in Allegro PCB Editor

Sanjiv Bhatia

With boards becoming more complex and lightweight at the same time, designing and manufacturing a cost-effective and reliable PCB has assumed greater significance than ever before. Inaccurate or incomplete design details can affect the fabrication of...
- 26 Jan 2022
Computational Fluid Dynamics: From EDA to SDA – The Emergence of Intelligent System Design Automation

Steve Brown

Technology innovation is continually transforming our user experience and disrupting the status quo. While much of the focus of technology disruption is on supply chains and business models, there is an underlying revolution happening in the design o...
- 25 Jan 2022
Computational Fluid Dynamics: This Week in CFD

John Chawner

Here are a few teasers for what you'll find in this week's round-up of CFD news and notes. How AI can be trained to identify more objects than are in its learning dataset. Will GPUs really take over and disrupt CFD simulation? A beginner&#39...
- 21 Jan 2022
Computational Fluid Dynamics: DoE INCITE Award for Cadence CFD

John Chawner

We are very excited to be part of a team selected for a Dept. of Energy INCITE Award. The Innovative and Novel Computational Impact on Theory and Experiment program is how the DoE's Office of Science provides the scientific community access ...
- 20 Jan 2022
Breakfast Bytes: PCIe 6.0 Standard Ratified...and Cadence's Implementation

Paul McLellan

The big news about PCIe 6.0 is that the specification has been released by the PCI-SIG. I covered some of PCIe 6.0 in my post The History of PCIe: Getting to Version 6, although a lot of that post was about earlier versions of the standard. More rece...
- 20 Jan 2022
Breakfast Bytes: Tensilica Security

Paul McLellan

2021 was famous for some of the worst security issues (accompanied by obligatory picture of bad guy in a black hoodie): The very first blog post of the year covered SolarWinds. See my post The Biggest Security Breach Ever. The middle of the year saw...
- 19 Jan 2022
Computational Fluid Dynamics: Pipistrel Reduces Energy Consumption Electric Aircraft through Propeller Optimization

AnneMarie CFD

Pipistrel used the propeller as an airborne wind turbine, by transforming the energy created by the descent of an aircraft into electric energy and storing it in a battery. As a result the aircraft consumes 6% less energy during climb. and net energy consumption during ascent/descent manoeuvres decreased by 19%. The performance of the propeller design was numerically computed with Omnis Turbo and this article describes…
- 18 Jan 2022
Breakfast Bytes: Computational Fluid Dynamics, Software, and Chip Design

Paul McLellan

There are a lot of commonalities between computational fluid dynamics (CFD), software, and chip design. All of them create a specification of the object of interest, and eventually use that representation as part of the manufacturing process. In betw...
- 18 Jan 2022
Life at Cadence: My Life at Cadence: Dajana Danilovic

Lautanen

Today’s interview features Dajana Danilovic, an application engineer based near Munich, Germany. In this video, Dajana shares about her pathway to becoming an engineer, as well as the importance of great teamwork and good communication. She has...
- 17 Jan 2022

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