• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Cadence Blogs

Stay up to date with our latest corporate and technology blog posts

Explore the Cadence Forums to find and exchange in-depth technical information.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

    Popular Search: Corporate NewsArtificial IntelligencePCB DesignCFD

Featured

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela
Reela 2 Sep 2025 • 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
Corporate 21 Aug 2025 • 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
Vinod Khera 31 Jul 2025 • 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
cdns - all_blogs_categories

  • All 6042
  • Corporate News 192
  • Life at Cadence 199
  • Academic Network 166
  • Analog/Custom Design 760
  • Artificial Intelligence 23
  • Cloud 16
  • Computational Fluid Dynamics 359
  • Data Center 39
  • Digital Design 423
  • Learning and Support 55
  • RF Engineering 113
  • SoC and IP 407
  • System, PCB, & Package Design  982
  • Verification 1284
  • Cadence Japan 3

  • CFD(数値流体力学) 45
  • 中文技术专区 15
  • カスタムIC/ミックスシグナル 188
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
  • The India Circuit 88
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List

Latest blogs

Academic Network

Students from Tsinghua University Visit Cadence Beijing

On October 20, 2016, 12 Masters and Ph.D. students mostly from Institute of Microelectronics…

Tracy Zhu 31 Oct 2016 • less than a min read
Cadence Academic Network

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? Arc-aware routing with enhanced contour hug saves…

Enhanced Contour Routing is a new prototype feature in the Cadence® Allegro® PCB…

edhickey 31 Oct 2016 • 1 min read
Allegro 17.2 , Routing , Rigid-Flex , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

Automotive at Linley: Intelligent Vehicles and Intelligent Intersections

The whole afternoon the second day of the Linley Processor Conference was dedicated…

Paul McLellan 31 Oct 2016 • 5 min read
Automotive , NXP , linley processor conference , tensilica vision , mike demler , Automotive Ethernet , Linley , autonomous vehicles , Breakfast Bytes

Breakfast Bytes

How Does Virtualization Work?

I wrote recently about the keynote from the Linley processor conference about network…

Paul McLellan 28 Oct 2016 • 6 min read
Intel , virtualization , IBM , VMware , vm/370 , vm/cms , Breakfast Bytes

System, PCB, & Package Design 

How PCB Design Teams Can Signoff on a Predictable Schedule by Finding Signal Integrity…

Sigrity Tech Tips Series A major challenge for PCB design teams is how…

Sigrity 27 Oct 2016 • 2 min read
PCB , pre-route analyzing , Signal Integrity , Sigrity , Allegro

Breakfast Bytes

What's For Breakfast? Video Preview October 31st to November 4th

https://youtu.be/wL43x-MOfWY It's Automotive Week on Breakfast Bytes. …

Paul McLellan 27 Oct 2016 • less than a min read
Automotive , ARM Techcon , functional safety , NXP , softbank , deep learning , wave computing , linley group , DVcon , DVCon Europe , ISO 26262 , wired magazine , ARM , fusa , reliability

Breakfast Bytes

Sophia Antipolis

Sophia Antipolis is in the south of France, a sort of research park carved out of…

Paul McLellan 27 Oct 2016 • 5 min read
vlsi technology , Intel , NXP , Infineon , Freescale , amadeus , Samsung , Bosch , dec , compass , Qualcomm , st ericsson , air france , sophia antipolis , Breakfast Bytes , digital equipment corporation

Breakfast Bytes

Make Sure Your Car Doesn't Break Too Often...When It Does, Make Sure You Catch I…

We need our cars to be safe as the amount of electronics in them increases almost…

Paul McLellan 26 Oct 2016 • 6 min read
Automotive , functional safety , iso26262 , ISO 26262 , Breakfast Bytes , reliability

Whiteboard Wednesdays

Whiteboard Wednesdays - Software-Driven VIP

In this week's Whiteboard Wednesdays video, we discuss about integration of IP in…

References4U 25 Oct 2016 • less than a min read
Verification IP , Whiteboard Wednesdays , integration , IP , VIP , SoC design

Academic Network

How Is It to Visit an Open Source Conference?

There are different conferences on microelectronics. There are the industry conferences…

Anton Klotz 25 Oct 2016 • 3 min read
Cadence Academic Network , academia , Risc V , open source , OpenRISC , ORCONF

Breakfast Bytes

DVCon Europe, What You Missed

DVCon Europe took place last week for the third time. If you are in China, you have…

Paul McLellan 25 Oct 2016 • 8 min read
Automotive , functional safety , NXP , DVcon , Accellera , DVCon Europe , ARM , Breakfast Bytes , reliability

Breakfast Bytes

Video Cameras: No Service for You

In the late 1970s, most scientific computing was done on digital equipment (DEC)…

Paul McLellan 24 Oct 2016 • 6 min read
security , bot , IoT , botnet , Internet of Things , mira , ddos , password , Breakfast Bytes , malware

Breakfast Bytes

MemCon: Memory for the Next Five Years

This year's MemCon keynotes were given by Hugh Durdan, VP of the IP Group at Cadence…

Paul McLellan 21 Oct 2016 • 5 min read
Automotive , ddr5 , Memory , DDR4 , LPDDR4 , Enterprise , cadence , LPDDR , Micron , flash , IoT , SSD , HMC , hbc , DRAM , lpddr5 , HPC , DDR , mobile , ADAS , datacenter , Breakfast Bytes , DDR3 , LPDDR3

Verification

DVCon(x2), DVClub(x2): Portable Stimulus Is Everywhere

In my most recent blog post , I talked about the industry vision for portable stimulus…

tomacadence 21 Oct 2016 • 4 min read
horizontal reuse , DAC , uvm , prototyping , pswg , Perspec , System Development Suite , DVClub , Emulation , DVcon , Accellera , portable stimulus , simulation , System Design and Verification

Breakfast Bytes

How Virtualization Is Changing Networking

On the second day of the Linley Processor conference, the keynote was by Bruce Davie…

Paul McLellan 20 Oct 2016 • 5 min read
virtualization , linley processor conference , VMware , Linley , network virtualization , Breakfast Bytes , networking

Breakfast Bytes

What’s for Breakfast? Preview October 24th to 28th (video)

https://youtu.be/PHVpQ_-tmY8 Monday: The IoT attacks, with the biggest distributed…

Paul McLellan 19 Oct 2016 • less than a min read
security , OIP , vast , Automotive , virtualization , functional safety , IoT , distributed denial of service , VMware , botnet , TSMC , vm/370 , Internet of Things , DVcon , DVCon Europe , ISO 26262 , ADAS , sophia antipolis , ddos , fusa , reliability , Virtutech

Breakfast Bytes

Andrzej Strojvas, the 2016 Kaufman Award Recipient

This year's Kaufman Award recipient is Andrzej Strojvas. He is the Keithley professor…

Paul McLellan 19 Oct 2016 • 5 min read
Andrzej Strojvas , Kaufman Award , cmu , pdf solutions , EDAC , carnegie meilon university , kaufman , Breakfast Bytes , esd alliance

Academic Network

Try These Innovative Online Educational Tools

Web applications for electronics design provide an environment where users can apply…

ChristinaK 19 Oct 2016 • 6 min read
EDA Playground , Cadence Academic Network , Spicy VOLTsim , Incisive simulator , ElvisLab

Whiteboard Wednesdays

Whiteboard Wednesdays - Error Injection: Predefined and Callbacks

In this week's Whiteboard Wednesdays video, James David talks about the benefits…

References4U 18 Oct 2016 • less than a min read
Verification IP , Whiteboard Wednesdays , IP , VIP , SoC
<>
CDNS - Fix Layout Hompage

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information