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Featured

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
Corporate 21 Aug 2025 • 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
Vinod Khera 31 Jul 2025 • 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Analog/Custom Design

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Jul 2025 • 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso
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Blog - Post List

Latest blogs

Breakfast Bytes

Andrew Kahng on the Last Semiconductor Scaling Levers

It's going to be academic week here on Breakfast Bytes. There is an anniversary coming…

Paul McLellan 30 Oct 2017 • 9 min read
scaling , EDA , cloud , andrew kahng , machine learning , moore's law , Breakfast Bytes

Breakfast Bytes

Decoding Formal Club: Arm and Arteris

At the latest meeting of the Decoding Formal Club, organized by Oski and sponsored…

Paul McLellan 27 Oct 2017 • 8 min read
Jasper User Group , JUG , oski decoding formal club , formal , Oski , Breakfast Bytes , Formal verification

System, PCB, & Package Design 

SI Methodology for Multi-Gigabit Serial Link Interfaces (2 of 8)

Let’s assume that we are working on a PCI Express Gen 4 serial link, running at 16Gbps…

Sigrity 26 Oct 2017 • 3 min read
Serial link analysis , Signal Integrity , Sigrity

Breakfast Bytes

What's For Breakfast? Video Preview October 30th to November 3rd 2017

https://youtu.be/JQVYmENG0gw Coming from the Cadence booth at Arm TechCon …

Paul McLellan 26 Oct 2017 • less than a min read
ARM Techcon , Rutenbar , Cadence Academic Network , scaling , introduction to vlsi systems , intern , mead and conway , kahng , Kaufman Award , esd alliance

Analog/Custom Design

Virtuosity: Read Mode Done Right

Because of the ease with which you can set up complex sweep, corner and Monte Carlo…

stacyw 26 Oct 2017 • 4 min read
ADE Explorer , Custom IC Design. Read only , ADE , Analog Design Environment , ADE Assembler

Breakfast Bytes

Why Was Arm Successful in Mobile?

I think that Arm was successful in mobile (and subsequently in other markets) due…

Paul McLellan 26 Oct 2017 • 5 min read
mobile , Silicon Valley , ARM , Breakfast Bytes

System, PCB, & Package Design 

Signal Integrity Methodology for Multi-Gigabit Serial Link Interfaces (1 of 8)

As data rates for serial link interfaces such as PCI Express® (PCIe®) Gen 4 move…

Sigrity 25 Oct 2017 • 6 min read
Serial link analysis , SI , Multi-Gigabit , IBIS-AMI , PCIe , Signal Integrity , SerDes , Sigrity

The India Circuit

Opportunities in India for IoT

This week we return to the Internet of Things (IoT). My previous blogs on the subject…

Madhavi Rao 25 Oct 2017 • 3 min read
Government of India , CDNLive India , digital india , smart cities , IoT , IT services , Internet of Things

Breakfast Bytes

Mike Muller Gets Emotional at Arm TechCon

As usual, Arm TechCon opened with a keynote by Mike Muller, Arm's CTO. His son is…

Paul McLellan 25 Oct 2017 • 6 min read
security , IoT , Mike Muller , ARM , Breakfast Bytes , Techcon

System, PCB, & Package Design 

Customer Support Recommends –Team Design in DE-HDL 17.2

Accelerating product time to market, achieving significantly higher productivity…

Neha 24 Oct 2017 • 2 min read
PCB , Rapid Adoption Kit , RAK , Support , Team design

Whiteboard Wednesdays

Whiteboard Wednesdays - Automotive Memory Technologies and Trends: Technology Im…

In this week's Whiteboard Wednesdays video, the last of a three part series, Scott…

References4U 24 Oct 2017 • less than a min read
Automotive , memory protocols , Whiteboard Wednesdays , Memory , NAND flash , automotive electronics , memory IP , DRAM , memory models

Breakfast Bytes

Xcelium Simulation on Arm Servers

Paul Otellini RIP Paul Otellini was CEO of Intel from 2005-2013. He died in his…

Paul McLellan 24 Oct 2017 • 4 min read
ARMv8 , Intel , x86 , cloud , mobile , ARM , microprocessor , datacenter , Breakfast Bytes

Analog/Custom Design

The Art of Analog Design Part 6: Response to Frank’s Question to Part 4

In the comments to blog #4, Frank Wiedmann asked about the correlation between the…

Art3 23 Oct 2017 • 3 min read
spectre aps , Virtuoso Variation Option , ADE Explorer , mismatch analysis , Analog Simulation , Monte Carlo analysis , DC Mismatch , Custom IC Design

Breakfast Bytes

Putting the Bad Guys in an Arm Lock

This morning Arm announced their Platform Security Architecture (PSA), a new way…

Paul McLellan 23 Oct 2017 • 6 min read
security , ARM Techcon , mirai , platform security architecture , psa , ARM , Breakfast Bytes , Techcon

Breakfast Bytes

Education, Occupation, and You: Vishal Kapoor at SJSU

Earlier this week, Jim Hogan hosted the next evening at San Jose State University…

Paul McLellan 20 Oct 2017 • 8 min read
san jose state university , vishal kapoor , san jose state , cognitive science , cognitive era , sjsu , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview October 23rd to 27th 2017

https://youtu.be/-9hc6xBOPFw Coming from SJSU Theater (camera Sean) Monday…

Paul McLellan 19 Oct 2017 • less than a min read
ARM Techcon , formal , Arteris , mobile , ARM , Formal verification

Breakfast Bytes

Mark Papermaster: Moore's Law Plus

Recently, I wrote about Robert Lang's presentation on Computational Origami . He…

Paul McLellan 19 Oct 2017 • 4 min read
epyc , has , chiplets , rocm , AMD , 3DIC , 2.5D IC , Breakfast Bytes

Breakfast Bytes

How to Build and Connect a Trillion Things: Arm TechCon Preview

Rob Aitken is digging a bit deeper into what it would really take to connect a trillion…

Paul McLellan 18 Oct 2017 • 7 min read
security , ARM Techcon , trust , IoT , Internet of Things , ARM , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - What's Driving Automotive Memory Trends and Technologies…

In this week's Whiteboard Wednesdays, the second in a three-part series, Scott Jacobson…

References4U 17 Oct 2017 • less than a min read
Automotive , Whiteboard Wednesdays , automotive electronics , ADAS , memory models
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