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Featured

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
Corporate 21 Aug 2025 • 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
Vinod Khera 31 Jul 2025 • 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Analog/Custom Design

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Jul 2025 • 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso
cdns - all_blogs_categories

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Blog - Post List

Latest blogs

Breakfast Bytes

Learning is the New Programming: Neural Nets

Whenever I hear of "deep learning," it makes me think of Deep Thought, the computer…

Paul McLellan 23 Feb 2016 • 4 min read
deep learning , embedded vision , learning , Tensilica , vision , neural networks , CNN , neural nets , embedded neural nets

Verification

UVM-ML OA: Now Within Incisive Platform As Well!

Open-source software has many advantages. In short: you can see it (the code), you…

teamspecman 22 Feb 2016 • 3 min read
Specman , UVM-ML OA , Incisive , multi-language

System, PCB, & Package Design 

How to Overlay Shapes on Top of Sets of Reference Objects with the Latest Cadence…

Many of you are familiar with the bond finger soldermask opening creation tool—used…

ICPackagingPro 22 Feb 2016 • 3 min read
bounding shapes , SiP , IC package design , APD , beta tools , package design , shapes

Breakfast Bytes

Automotive Test, How to Use Just Two Pins

Automotive chips often suffer from a limited chip interface in which most of the…

Paul McLellan 22 Feb 2016 • 4 min read
Automotive , two pin test , JTAG , tap , manchester encoding , tap controller , low pin count test

Breakfast Bytes

Internet of Things: How Will They Be Built?

The Internet of Things (IoT) is not really a market, it is a catchall term for devices…

Paul McLellan 19 Feb 2016 • 3 min read
security , IoT , MIPI , CSI , encryption , wearables , fitness tracker , Internet of Things , drones , FitBit , power

Breakfast Bytes

How ARM Servers Can Take Over the World

One of the big themes of the Linley Data Center Conference last week was the possibility…

Paul McLellan 18 Feb 2016 • 4 min read
ARMv8 , Intel , AMD , arm servers , red hat , broadcom , Qualcomm , AppliedMicro , ARM , linux

Breakfast Bytes

Care for Some Gates With Your Server?

One of the big themes from the Linley Data Center Conference earlier this month was…

Paul McLellan 17 Feb 2016 • 4 min read
Intel , GPU , data center , Altera , HBM , cloud , High Bandwidth Memory , Stratix , datacenter , FPGA , cloud computing

Whiteboard Wednesdays

Whiteboard Wednesdays—Ethernet and Automotive Electronics

In this week's Whiteboard Wednesdays video, Sachin Dhingra follows up on last week…

References4U 16 Feb 2016 • less than a min read
Automotive , Whiteboard Wednesdays , IP , Automotive Ethernet , automotive electronics

Breakfast Bytes

Cadence at embedded world—ADAS, the Stepping Stone to Self-Driving Cars

Cadence will be at embedded world in Nüremberg from February 23 to 26. We will be…

Paul McLellan 16 Feb 2016 • 3 min read
functional safety , vision processing , nüremburg , ECU , Automotive Ethernet , Tensilica , ISO 26262 , Embedded World , video processing , audioprocessing , Breakfast Bytes

Verification

Functional Verification Closure—Are We Done Yet?

In my job as product marketing director for vManager and MDV, I get to hear this…

John Brennan 12 Feb 2016 • 4 min read
methodology , verification strategy , Functional Verification , Metric Driven Verification , vPlan , Incisive , Plan and metrics management , vManager

Breakfast Bytes

Interface IP in Consumer Electronics

What is the consumer marketplace? It is a bit of a tautology, but it is electronic…

Paul McLellan 12 Feb 2016 • 3 min read
IP , Consumer Electronics , interface IP , Breakfast Bytes

Breakfast Bytes

Software-Driven Hardware Verification

There is a transition going on in the system and semiconductor worlds. Some system…

Paul McLellan 11 Feb 2016 • 4 min read
palladium z1 , virtual platform , Palladium , Emulation , software , Breakfast Bytes , verification

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Shape Edit Application Mode? New Capabilities…

The Allegro PCB Editor 16.6-2015 release provides Shape Edit Application Mode, a…

Jerry GenPart 10 Feb 2016 • 6 min read
PCB , PCB Layout and routing , Allegro GUI , Allegro 16.6 , Routing , High Speed , SPB , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Allegro

Whiteboard Wednesdays

Whiteboard Wednesdays—Where Ethernet Is Used in Automotive Electronics

In this week's Whiteboard Wednesdays video, Sachin Dhingra takes a closer look at…

References4U 9 Feb 2016 • less than a min read
Automotive , Whiteboard Wednesdays , IP , Automotive Ethernet , Ethernet

Breakfast Bytes

Where You Going? Barcelona (and Mobile World Congress)

Mobile World Congress (MWC) is later this month in Barcelona in Spain (actually in…

Paul McLellan 9 Feb 2016 • 3 min read
mwc16 , barcelona , Mobile World Congress , MWC , Tensilica , tensilican vision dsp , tensilica hifi , Breakfast Bytes

Breakfast Bytes

Autonomous Vehicles and the Semiconductor Industry: a Double-Edged Sword

A couple of weeks ago, I wrote about how automotive companies are going to need to…

Paul McLellan 8 Feb 2016 • 3 min read
Automotive , sidecar , lyft , ADAS , autonomous vehicles , general motors

System, PCB, & Package Design 

How to Maximize Performance When Your Package Layout Gets Complicated

We are all familiar with it. Every year, designs get faster, smaller, and more complicated…

ICPackagingPro 5 Feb 2016 • 6 min read
Cadence Design Systems , SiP , Digital SiP design , IC package design , APD , package design , Allegro Package Designer

Breakfast Bytes

Datacenter in a Can

Earlier this week I wrote about the Linley Data Center Conference and how Thermal…

Paul McLellan 5 Feb 2016 • 3 min read
microsoft , data center , google , thermal , cooling , power

Breakfast Bytes

"Thermal is the New Power" and Melting Butter with Your Phone

For some time now, SoC design groups have had to optimize PPA: performance, power…

Paul McLellan 4 Feb 2016 • 4 min read
thermal management , PPA , thermal , power
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CDNS - Fix Layout Hompage

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