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Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
Corporate 30 Jun 2026 • 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

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  • Learning and Support 63
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  • SoC and IP 435
  • System, PCB, & Package Design  1017
  • Verification 1329
  • Cadence Japan 18
  • Physical Systems Simulation 24

  • CFD(数値流体力学) 45
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  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
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  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - Evolution of Ethernet: Not Your Grandfather's Ethernet

In this week's Whiteboard Wednesdays, Scott Jacobson wraps up his three-part series…

References4U 31 Jan 2017 • less than a min read
Verification IP , Whiteboard Wednesdays , VIP , Automotive Ethernet , Ethernet

Breakfast Bytes

ENIAC, EDSAC and Colossus... and the Difference Engine

There are lots of claims to be the first computer, depending on your definition of…

Paul McLellan 31 Jan 2017 • 5 min read
edsac , analytical engine , mercury delay line , difference engine , first stored program computer , eniac

Analog/Custom Design

Virtuoso Video Diary: Is It That Easy to Edit in the Virtuoso Schematic Editor?

Creating a neat and organized schematic is extremely important, and often requires…

deeptig 30 Jan 2017 • 3 min read
Virtuoso Schematic Editor , VSE L , Advanced Node , VSE XL , Virtuoso Video Diary , Custom IC Design

Breakfast Bytes

Andrzej Strojwas Receives the 2016 Kaufman Award

Last night was the annual Kaufman Award dinner to present the award to this year…

Paul McLellan 30 Jan 2017 • 6 min read
Kaufman Award , kaufman award dinner , andrzej strojwas , pdf solutions

Breakfast Bytes

What's For Breakfast? Video Preview January 30th to February 3rd 2017

https://youtu.be/NxgrCMJYRew Coming from Kaufman Award Dinner Monday: The…

Paul McLellan 27 Jan 2017 • less than a min read
asml standard node , formal , Kaufman Award , STA , andrzej strojwas , variability , standard node , Formal verification

Breakfast Bytes

SPIE Advanced Lithography Conference

SPIE is the international society for optics and photonics, with the purpose of …

Paul McLellan 27 Jan 2017 • 4 min read
lithography , imec.spie advanced lithography , SPIE

Breakfast Bytes

Frank Chen of a16z on 16 Things About Autonomous Vehicles

In a recent a16z presentation, Frank Chen, a partner at Andreessen-Horowitz, says…

Paul McLellan 26 Jan 2017 • 6 min read
autonomous cars , self-driving cars , a16z , autonomous vehicles

Breakfast Bytes

ENNS 2017: Deep Learning, the New Moore's Law

One of the hottest areas in systems right now is deep learning: neural networks,…

Paul McLellan 25 Jan 2017 • 3 min read
CVPR , deep learning , enns 2017 , CNN

Whiteboard Wednesdays

Whiteboard Wednesdays - Evolution of Ethernet: The Early Days

In this week's Whiteboard Wednesdays video, the second in a three-part series, Scott…

References4U 24 Jan 2017 • less than a min read
Verification IP , Whiteboard Wednesdays , Scott Jacobson , VIP , Ethernet

Analog/Custom Design

New Virtuoso ADE Suite Wins Product of the Year

Cadence today announced that its next-generation Virtuoso® Analog Design Environment…

TeamADE 24 Jan 2017 • 1 min read
ade suite , electronic products , product of the year

Breakfast Bytes

Nibbles: Breakfast Bytes Predictions 2017

It's that time of year when pundits try and predict major changes that will happen…

Paul McLellan 24 Jan 2017 • 3 min read
2016 predictions , 2017 predictions

Verification

Bare Metal Tests and Hardware-Software Co-Verification

One interesting question that arises from time to time is whether the Cadence® Perspec…

tomacadence 23 Jan 2017 • 4 min read
hardware-software co-verification , uvm , pswg , Acceleration , Perspec , virtual platform , System Design and Verification , Emulation , System simulation and analysis , Accellera , FPGA prototypes , testbench , portable stimulus , silicon , bare metal , verification

Breakfast Bytes

RISC-V "The thing that you learn and the thing that you use are the same"

The Electronic System Design Alliance (fka EDAC) has been organizing evening meetings…

Paul McLellan 23 Jan 2017 • 7 min read
risc-v , cadence , isa , Jim Hogan , instruction set architecture , sifive , esd alliance

Analog/Custom Design

Virtuoso Video Diary: Demystifying the Abstract

You heard it right! It’s Virtuoso Abstract Generator, the popular library modeling…

Priya Sriram 20 Jan 2017 • 3 min read
AG , abstract , Virtuoso Video Diary , Custom IC Design , Virtuoso Layout Suite XL

Breakfast Bytes

Automotive at CES

Automotive was huge at CES. A lot of it went for the glamour without really having…

Paul McLellan 19 Jan 2017 • 3 min read
Automotive , NVIDIA , Qualcomm

Whiteboard Wednesdays

Whiteboard Wednesdays - Interconnect Design Verification Challenges

In this week's Whiteboard Wednesdays video, Nimrod Reiss takes a closer look at the…

References4U 17 Jan 2017 • less than a min read
Verification IP , Whiteboard Wednesdays , VIP , MIPI , MIPI protocols , Nimrod Reiss , verification

Breakfast Bytes

Security in 2016 and 2017

It's the start of the year, plus the Consumer Electronics Show is over. I've already…

Paul McLellan 17 Jan 2017 • 3 min read
security , botnets , mirai , drones , Singapore

Analog/Custom Design

Virtuoso Video Diary: Using the Hierarchical Color Locking Check

As you incrementally build your design and decompose the layout geometry into masks…

mita 16 Jan 2017 • 2 min read
dbLock , Hierarchical Color Locking Conflicts , Multiple Patterning Technology , HCL , Coloring Engine , Virtuoso Video Diary , Hierarchical Color Locking Check , multi-patterning technology , Custom IC Design , MPT

Academic Network

Cadence Academic Network Events in Russia

Despite all of the recent political tensions, Russia remains an attractive market…

Anton Klotz 16 Jan 2017 • 2 min read
MIET , Cadence Academic Network , MEPHI , RusNano , Russia
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