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Latest Blog Posts

  • Breakfast Bytes: Who Is Satoshi Nakamoto?

    Paul McLellan
    Paul McLellan
    Nobody knows. Really. Here's what is known. He (or maybe it's she or they) is the author of the 2008 paper Bitcoin: A Peer-to-Peer Electronic Cash System that got posted to the cypherpunk mailing list. This paper introduced Bitcoin and t...
    • 1 Mar 2019
  • Life at Cadence: International Women's Day

    FormerMember
    FormerMember
    Cadence hosts Girls Who Code founder and CEO Reshma Saujani for talk Cadence is excited to celebrate International Women’s Day, which takes place on March 8, with a month-long series of events for our employees across the globe. To thank and r...
    • 28 Feb 2019
  • Breakfast Bytes: Signal Integrity for 112G

    Paul McLellan
    Paul McLellan
    At DesignCon at the end of January, a team from Cadence presented to a standing-room-only crown on Modeling and Simulating 112Gbps SerDes. The team was Margaret Johnston, Manuel Juschas, Bhaskar Acharya, Kumar Keshavan, and Ken Willis. The 112Gbps Se...
    • 28 Feb 2019
  • Analog/Custom Design: Spectre Tech Tips: Device Aging? Yes, even Silicon wears out

    Moustafa Moham
    Moustafa Moham

    While most of us would like our electronic gadgets to last forever, the reality is that these gadgets have a lifetime. Most of the time, the lifetime of devices is limited by either mechanical (switch, relay), or thermal (fuse, capacitor) failures. However, as microchips designed in advanced technologies become more pervasive, the lifetime of microchips has become an additional issue.

    Several effects contribute to device…

    • 28 Feb 2019
  • Breakfast Bytes: DesignCon: 5G for V2X Communication

    Paul McLellan
    Paul McLellan
    One of the keynotes at the recent DesignCon was by Robert Heath of UT Austin titled 5G for Vehicle-to-X Communications. He started off with an overview of 5G, pointing out that there is a move from mobile handsets to other markets: e-Health, energy, ...
    • 27 Feb 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Evolution of the ConnX Family with B10 and B20

    References4U
    References4U

    In this week’s Whiteboard Wednesdays, Pierre-Xavier Thomas introduces the B10 and B20 as a complement to the ConnX family with higher performance and additional features to support new wireless communications standard and high-resolution radar/lidar applications.

    https://youtu.be/MaWYNbOEbMo

    • 26 Feb 2019
  • Analog/Custom Design: Virtuosity: New Flexible Subwindows

    Arja H
    Arja H
    Plots in Cadence Virtuoso Visualization and Analysis can be plotted in a window or subwindow. Subwindows allow you to see plots from different analyses side by side. Until IC6.1.8/ICADVM18.1, the subwindows were not very flexible. Now, we've improved these so that you can choose any grid layout of subwindows up to a 6x8 grid. In addition, you can resize the subwindows easily and move them around. These subwindow configurations…
    • 26 Feb 2019
  • Breakfast Bytes: Tensilica ConnX B20 for 5G, and Automotive Radar/Lidar

    Paul McLellan
    Paul McLellan
    I'm sure you've noticed that there is a lot of talk about 5G in the air. Well, "in the air" is the one place it isn't, since it is a new standard that is being brought to market over the next few years. There are a lot...
    • 26 Feb 2019
  • The India Circuit: Opportunities for India in Industry 4.0

    Madhavi Rao
    Madhavi Rao
    The India Electronics and Semiconductor Association (IESA) the industry body that represents the industry, had its annual conference – the IESA Vision Summit – in Bangalore last week. There were many eminent speakers, one of them being by...
    • 25 Feb 2019
  • Breakfast Bytes: OFC: The Optical Fiber Communication Conference

    Paul McLellan
    Paul McLellan
    OFC is the Optical Fiber Communication Conference and Exposition (yes, some initials got lost in the acronym...it used to be just the Optical Fiber Conference). It is in San Diego from 3rd to 7th March, for the conference, and from 5th to 7...
    • 25 Feb 2019
  • Breakfast Bytes: Sunday Brunch Video for 24th February 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/uUWiysEM4jM Made on the top of building 10 (camera Sean) Monday: dark Tuesday: All the Ps: the Photonics PDK Panel Wednesday: Ronto and Quecto Are Not Cheeses Thursday: Who Is Green Hills? Friday: Badges—Not Just for Scout...
    • 24 Feb 2019
  • PCB、IC封装:设计与仿真分析: DesignCon:Cadence与IBM联手讲授高级IBIS-AMI技术

    SDA China
    SDA China
    本文翻译自Cadence "Breakfast Bytes" 专栏作者Paul McLellan文章 "DesignCon: Cadence teaches AMI and IBIS"。 space 在前不久结束的DesignCon上,Cadence及其客户IBM就32 GT/s及以上的高级IBIS-AMI技术做出了演讲教程。 IBIS-AMI技术让我想到了一个很好的类比:降噪耳机。如果我们想把音乐从智能手机(发射器)传输到大脑(接收器)而不被噪音干扰,降噪耳机是我们的不二选择。在播放音乐时,降...
    • 22 Feb 2019
  • Breakfast Bytes: Badges—Not Just for Scouts Anymore

    Paul McLellan
    Paul McLellan
    Were you a Boy Scout? Or a Girl Guide or Girl Scout? What badges did you earn? Not the digital technology badge, to the left, since that was only introduced in 2014 to replace the computers badge. It looks like an SoC (scout-on-chip) on a small print...
    • 22 Feb 2019
  • System, PCB, & Package Design : Simulation of LPDDR4X Interface: What Designers Need to Know and Do

    Sigrity
    Sigrity
    System designers are familiar with standard DDR4 RAM components but with the demands on increasing performance and decreasing power consumption in mobile products, LPDDR4 and its variation, LPDDR4X, have become the desired memory devices for in-vehi...
    • 21 Feb 2019
  • Analog/Custom Design: Verifying Power Intent in Analog and Mixed-Signal Designs Using Formal Methods

    msteam
    msteam

     Analog and Mixed-signal (AMS) designs are increasingly using active power management to minimize power consumption. Typical mixed-signal design uses several power domains and operate in a dozen or more power modes including multiple functional, standby and test modes. To save power, parts of design not active in a mode are shut down or may operate at reduced supply voltage when high performance is not required. These…

    • 21 Feb 2019
  • Analog/Custom Design: Virtuosity: A Smart Extracted View

    Arja H
    Arja H
    The Cadence Quantus Smart View is the next generation of the Extracted View in the Virtuoso environment. The Smart View provides the same functionality as the Extracted View, but it uses a highly efficient and scalable storage mechanism. This means that Smart View can manage larger, more complex designs at advanced nodes with a reduced overall extraction run time and netlist size. In fact, the Smart View not only helps…
    • 21 Feb 2019
  • Breakfast Bytes: Who Is Green Hills?

    Paul McLellan
    Paul McLellan
    Cadence announced during their recent quarterly earnings announcement and call that we are acquiring approximately 16% ownership in Green Hills Software for about $150M. Lip-Bu Tan, Cadence's CEO, joined their board of directors. Talking of Green Hi...
    • 21 Feb 2019
  • Digital Design: Pattern Technology Applied to Machine Learning-based Hotspot Prediction

    Philippe Hurat
    Philippe Hurat
    I have been working on DFM solutions for (too) many years and the objective hasn’t change: Detect or predict design-process weakpoints also known as hotspots, to limit systematic yield loss in semiconductor manufacturing. Traditional methods, c...
    • 20 Feb 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - An Introduction to IC Test and Modus

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, distinguished Engineer Rohit Kapur introduces the concept of scan testing and gives an overview of the Modus DFT Software Solution and Genus Synthesis Solutions from Cadence. Learn the basic steps of Design for Test (DFT) including scan design, test pattern generation (ATPG), and fault simulation.  For more information, read the datasheet and visit the product page at www…

    • 20 Feb 2019
  • Breakfast Bytes: Ronto and Quecto Are Not Cheeses

    Paul McLellan
    Paul McLellan
    The International Bureau of Weights and Measures (its initials are BIPM because it is in France, the Bureau International des Poids et Mesures) recently redefined the kilogram. Meera wrote about it late last year in Size (of the Kilogram) Matters. Th...
    • 20 Feb 2019
  • PCB、IC封装:设计与仿真分析: 什么是COM/JCOM信道合规技术

    Sigrity
    Sigrity
    在当今这个数以十计/两位数Gbps的数据时代里, 工程师的工作越来越不容易,正确地设计并表征系统以符合不断刷新的业内标准搞得大家焦头烂额,不仅要对高速串行链路及其所有损耗进行仿真,还得通过合规测试。 雪上加霜的是,大家熟悉的依靠比较不同频域参数(例如插入损耗、回波损耗、串扰等)从而发现设计缺陷的传统合规性检查方法已经过时了!由于没有考虑到不同参数的相互依存性和权衡裕量 问题,传统方法容易导致过度设计和成本过高问题。例如,如果一个设计满足插入损耗和串扰指标且有很大裕量,而仅有回波损耗一...
    • 19 Feb 2019
  • System, PCB, & Package Design : Take a lesson from the Amish...

    BillAcito
    BillAcito
    “Time to design completion” is almost always the primary metric and the cause for the most angst within a design team. Your customers demand that a package design is completed as quickly as possible to minimize the impact to the...
    • 19 Feb 2019
  • Breakfast Bytes: Breakfast Buffet for January 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/4N5bx3eR_9U The three highlighted posts for January were: Breakfast Nibbles: Predictions for 2019 AlphaZero: Four Hours to World Class from a Standing Start Persistent Memory Sign up for Sunday Brunch, the weekly Breakfast Byt...
    • 19 Feb 2019
  • Breakfast Bytes: All the Ps: the Photonics PDK Panel

    Paul McLellan
    Paul McLellan
    At DesignCon at the end of January, there was a panel on photonics. The title was Photonics Coming of Age: The Emergence of PDKs. The panelists were: Moderator James Pond of Lumerical (CTO). Lumerical provides photonic simulation software (and more)...
    • 19 Feb 2019
  • Breakfast Bytes: Sunday Brunch Video for 17th February 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/ZuoAfBXsbGw Made in front of the green screen (camera Sean) Monday: SPIE 2019: Light Entertainment Tuesday: DVCon Preview: The Year of PSS Wednesday: MWC Barcelona: 5G in Catalonia Thursday: Embedded in Nuremberg Friday: Presidents&#...
    • 17 Feb 2019
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