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Breakfast Bytes: Virtuoso System Design Platform Is Product of the Year

Paul McLellan

The title of this post says it all, but I'd better add a bit of color. Cadence was honored with an Electronic Products' Product of the Year award for the Virtuoso System Design Platform. This is the 42nd year that Electronic Products has...
- 9 Jan 2018
Breakfast Bytes: 2017: A Year in Breakfasts

Paul McLellan

So 2017 is over. Taylor Swift got into trouble for saying it was a great year and not being political enough. Well, I hope that I'm not going to get into trouble for saying 2017 was a great year for the whole semiconductor ecosystem (and Breakfas...
- 8 Jan 2018
Verification: Portable Stimulus User Gives Perspec PSS Technology Nearly Perfect Review

Steve Brown

It’s always good to hear what real users think of products. Here is a very detailed review (~4000 words) by an Anonymous user, nick named Ant-Man (from the movie). Overall it’s a very strong endorsement of Perspec, and summarize...
- 8 Jan 2018
Verification: Register for the UVM Register Layer Webinar on January 12!

XTeam

On Friday, January 12, Doulos is hosting a UVM Register Layer webinar, with the aim of helping users model UVM in certain less-intuitive ways. This webinar will cover the usage of user-defined front and back doors to extend register-layer capabilities past simple call-and-response transactions, understanding the role the predictor plays in updating the register model, and how to use register callbacks to model strange…
- 5 Jan 2018
Breakfast Bytes: GLOBALFOUNDRIES 7nm

Paul McLellan

Earlier in the week, I wrote about my meeting with Gary Patton the day before GLOBALFOUNDRIES presented their 7nm process as IEDM. See Gary Patton on GF, IBM, 7nm, EUV, and More for more details. Earlier in the morning, Intel had announced detai...
- 5 Jan 2018
Analog/Custom Design: Automatically Reusing an SoC Testbench in AMS IP Verification

msteam

The complexity and size of mixed-signal designs in wireless, power management, automotive, and other fast growing applications requires continued advancements in a mixed-signal verification methodology. An SoC, in these fast growing applications, incorporates a large number of analog and mixed-signal (AMS) blocks/IPs, some acquired from IP providers, some designed, often concurrently. AMS IP must be verified independently…
- 4 Jan 2018
System, PCB, & Package Design : SI Methodology for Multi-Gigabit Serial Link Interfaces (4 of 8)

Sigrity

Enabling Constraint-Driven Design With the pre-layout testbench built, populated with relevant models, and producing realistic simulation results, it is time to get constraints in place to drive and control the physical layout of the serial link. Thi...
- 4 Jan 2018
Breakfast Bytes: CES18 Preview

Paul McLellan

It's the start of a new year and that means it is the Consumer Electronics Show in Las Vegas. Although it is a zoo, it is a good place to get a feel for what is new in the consumer electronics space (and that increasingly includes automotive, not...
- 4 Jan 2018
Breakfast Bytes: What is Meltdown? How Can It Affect Both Intel and Arm?

Paul McLellan

If you pay attention to anything to do with processors, security, or even investment discussion sites covering companies like Intel, you may be aware that 2018 has started with the discovery of a major security flaw that affects all high-end micropro...
- 3 Jan 2018
Breakfast Bytes: What's For Breakfast? Video Preview January 8th to 12th 2018

Paul McLellan

https://youtu.be/txCnT3N4OSY Coming from Executive Briefing Center (camera Sean) Monday: 2017—A Year in Breakfasts Tuesday: Virtuoso System Design Platform is Product of the Year Wednesday: Post Silicon Compute Thursday: Co...
- 3 Jan 2018
System, PCB, & Package Design : SI Methodology for Multi-Gigabit Serial Link Interfaces (3 of 8)

Sigrity

IBIS-AMI Modeling With initial PCB trace and via models in place for our hypothetical PCI Express Gen 4 serial link, the remaining missing piece is for an IBIS-AMI model of the transmitter, with “AMI” standing for Algorithmic Model Interf...
- 3 Jan 2018
Breakfast Bytes: Gary Patton on GF, IBM, 7nm, EUV, and More

Paul McLellan

At IEDM in December, I sat down with Gary Patton, CTO of GLOBALFOUNDRIES, to discuss their manufacturing in general, and especially their 7nm process, EUV, and their Malta fab8, where Gary is based. We actually met the day before the presentatio...
- 3 Jan 2018
The India Circuit: Face Recognition and Hackathon: An Unlikely and Innovative Combination

Madhavi Rao

Happy New Year! While most other folks are just easing back to work, those of us in the Indian semiconductor ecosystem are gearing up for one of our biggest events of the year. The first week of January is when the VLSI and Embedded Systems Conf...
- 3 Jan 2018
Breakfast Bytes: Intel 10nm

Paul McLellan

At IEDM last month, Intel announced details of their 10nm process. Later the same morning, they also gave details on a 22nm process, 22FFL, which is a second generation 22nm process (their first FinFET process was also 22nm) targeted at mobile and RF...
- 2 Jan 2018
Breakfast Bytes: Frankenstein

Paul McLellan

"Hail to thee, blithe spirit! Bird thou never wert"...and Frankenstein. What do these two have to do with each other? And why did I pick today to ask such an odd question? You may recognize the quote as the opening line of Percy Bysshe She...
- 1 Jan 2018
Breakfast Bytes: What's For Breakfast? Video Preview January 1st to 5th 2018

Paul McLellan

https://youtu.be/Xja6H1meqac Coming from Yosemite National Park (camera Carey Guo) Monday: Frankenstein Tuesday: Intel 10nm Wednesday: Gary Patton at IEDM Thursday: CES 2018 Preview Friday: GLOBALFOUNDRIES 7nm www.break...
- 29 Dec 2017
Breakfast Bytes: Why Don't Planes Obey Moore's Law?

Paul McLellan

In my post about Silexica (Silexica: Mastering Multicore) I said that I like to use planes as an analogy for cores in a multi-core system. As I said there: They haven't got appreciably faster but you can have lots of them. If you want to transp...
- 15 Dec 2017
Analog/Custom Design: Virtuosity: From Hatchlings to Fledglings to a Flock of Birds Blogging Together

Rishu Misri Jaggi

“The reason birds can fly and we can't is simply because they have perfect faith, for to have faith is to have wings.” ― J.M. Barrie, The Little White Bird When a few of us in the Cadence CAS Technical Communications Engi...
- 14 Dec 2017
Breakfast Bytes: Blue LEDs, Nobel Prizes, and IEDM Keynote

Paul McLellan

At IEDM last week, for the first time, there was a second plenary session (awards and keynotes) on Wednesday. presented by Nobel Laureate Hiroshi Amano, one of the inventors of the high intensity blue light emitting diode (LED). He ta...
- 14 Dec 2017
Breakfast Bytes: Ploughing 1 TB of RAM with Twenty x86 Oxen and 10,000 RISC-V Chickens

Paul McLellan

OK, that wins the prize for best title of a presentation in the recent RISC-V workshop, or pretty much any workshop. I couldn't resist using it aa a title for this post. Can you say click-bait? You'll have to read almost to the end ...
- 13 Dec 2017
Whiteboard Wednesdays: Whiteboard Wednesdays - What to expect from TLM 2.0 Models for Memory Subsystems - Part 1

References4U

In this week's Whiteboard Wednesday, Vivek Nandakumar explains the behavioral differences between Loosely Timed (LT) and Approximately Timed (AT) TLM 2.0 models.

https://youtu.be/TRdukWFeQSM
- 12 Dec 2017
Breakfast Bytes: RISC-V Workshop, Milpitas

Paul McLellan

The latest semi-annual RISC-V workshop took place the week after Thanksgiving. The last one was in Shanghai. The next one is in Barcelona. This one was in...Milpitas. At least it didn't require a plane to get there. It was at what I think of as S...
- 12 Dec 2017
Learning and Support: What's New in Cadence Help 3.0?

Vani V

I am sure you would agree when I say that a help tool is the one utility without which no software service can ever work. Cadence Help is one such powerful tool, which is integrated with almost all Cadence products; you would never realize that it is a separate application. It is available on all supported platforms and can be invoked from the Help menu or dialog boxes of your Cadence products.
- 12 Dec 2017
Breakfast Bytes: COTS? Commercial Products in US Government Electronics

Paul McLellan

COTS is government jargon for Commercial Off-The-Shelf. This means the government going out and purchasing commercial products that are available to anyone, not something commissioned specially by the government and unavailable to anyone else. It can...
- 11 Dec 2017
The India Circuit: Four Exciting Examples of Modern AI from NVIDIA

Madhavi Rao

A few months ago, we had the honor of having Vishal Dhupar, Managing Director of NVIDIA India, speak at an executive forum that we had in Bangalore. NVIDIA's GPU technology is used to power what they call "modern AI", so the audien...
- 11 Dec 2017

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