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Computational Fluid Dynamics: The CFD Vision 2030 Roadmap: 2020 Status, Progress, and Challenges

John Chawner

After a long writing (and longer editing and approval seeking) process, the AIAA's CFD Vision 2030 Integration Committee has published its first update to the Vision's roadmap. This 71 page, thoroughly cited report assesses progress toward th...
- 28 Jul 2021
Breakfast Bytes: July Update

Paul McLellan

This is the July edition of the now monthly update post, with small updates to existing posts and themes that don't justify a whole Breakfast Bytes post on their own. Cadence is off for a global recharge day on Friday, so Breakfast Bytes will not...
- 28 Jul 2021
Breakfast Bytes: Designed with Cadence Video Series

Paul McLellan

Designed with Cadence is a video series made with Cadence customers about how they used Cadence technology to design real products. Each video is about two to three minutes long. There are currently more than 20 of them, with new ones being added eve...
- 27 Jul 2021
Breakfast Bytes: HOT CHIPS 2021 Preview

Paul McLellan

As usual in August, it is HOT CHIPS. I always find this one of the most interesting conferences of the year. It gives a lot of insight into the specific products being presented, but also a feel for what technologies are being used for the most advan...
- 26 Jul 2021
中文技术专区: 6G时代来了，我们应该为设计准备什么？

FormerMember

7月22日至23日，为期两天的“电子设计创新大会（EDICON China 2021）”在上海博雅酒店成功举行，本次大会汇聚了业界一众技术专家与企业领袖，与大家共同探讨最前沿的技术与最新行业发展趋势。作为EDICON China钻石赞助商，Cadence受邀参加本次会议，并带来了3场技术演讲。其中，Cadence公司副总裁兼系统仿真事业部总经理顾鑫（Ben Gu）先生在7月22日上午的会议中，为我们带来了题为“5G/6G系统设计与分析”的重磅演...
- 26 Jul 2021
RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environment V16 ソフトウェアのリリースをハイライト

RF Design Japan

Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。 AWR Design Environment V16 ソフトウェア...
- 25 Jul 2021
Breakfast Bytes: Sunday Brunch Video for 25th July 2021

Paul McLellan

https://youtu.be/cwT7KL4iShY Made on "a tropical beach" Monday: Aerospace and Defense Systems Day...and DAU Tuesday: 75 Years of the Microprocessor Wednesday: CadenceLIVE Cloud Panel Thursday: Cerebrus: The Future of Intelligent Chip D...
- 25 Jul 2021
RF Engineering: μWaveRiders: Cadence AWR Design Environment V16 Software Release Highlights

TeamAWR

The Cadence AWR Design Environment V16 production release is now available for download at Cadence Downloads with design environment, AWR Microwave Office, AWR VSS, AWR Analyst, and other enhancements.
- 23 Jul 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

Given that I'm perpetually late on sharing This Week in CFD here on the Cadence CFD blog, I ought to start calling it This Weekend in CFD or Last Week in CFD. But now that we're here... What does a DNS computation on 450,000 cores and a CFD...
- 23 Jul 2021
System, PCB, & Package Design : BoardSurfers: Accelerating Allegro Layout Tools Using NVIDIA GPUs for Complex Board Designs

pbernard

Boards and Packages are getting extremely complex and large; what used to be considered large with millions of objects is now close to 100s of millions of objects. Traditional rendering on CPU of such large and complex designs is not scalable for tod...
- 23 Jul 2021
System, PCB, & Package Design : BoardSurfers: Installation Know-How: Download Manager – Better than Ever Before

Shikha Jain

The Download Manager user interface has been revamped in 17.4-2019 HotFix 019. Various new features are integrated to enhance user experience and efficiency. The latest release of Download Manager delivers modern UI architecture with a scope for future enhancements...
- 23 Jul 2021
Computational Fluid Dynamics: Damen: Wind Study On A Slender Boat Design Using Computational Fluid Dynamics

AnneMarie CFD

DAMEN and Numeca develop a CFD methodology to proof a vessel has sufficient transversal stability to resist over-rolling in severe side winds. With more than 80 percent of the total global trade being transported through international ship...
- 23 Jul 2021
Breakfast Bytes: Machine Learning in EDA

Paul McLellan

Yesterday, in my post Cerebrus: The Future of Intelligent Chip Design, I talked about our latest product to use machine learning (ML) techniques to great effect. Although they are all slightly different, machine learning is also known as artificial i...
- 23 Jul 2021
System, PCB, & Package Design : Cadence OrCAD and Allegro 17.4-2019 HotFix SPB17.40.019 is Now Available

AllegroReleaseTeam

The HotFix 019 (QIR 3, indicated as 2021.1 in the application splash screens) update for Release 17.4-2019 of OrCAD and Allegro products is now available at Cadence Downloads. This blog post contains important links for accessing this update and introduces s...
- 22 Jul 2021
Breakfast Bytes: Cadence Cerebrus - Intelligent Chip Explorer

Paul McLellan

This morning, we announced the Cadence Cerebrus Intelligent Chip Explorer, a machine learning (ML)-based tool that automates and scales digital chip design. If you think about what a designer does with traditional EDA tools, a lot of it is running so...
- 22 Jul 2021
Life at Cadence: How Culture Can Flourish in the New Normal

Jaswinder

Peter Drucker rightly said, “Culture eats strategy for breakfast”. An inclusive high-performance culture is an enduring competitive advantage. We establish rituals and practices in the office, model desired behaviors, and lead by example...
- 21 Jul 2021
Breakfast Bytes: CadenceLIVE Cloud Panel

Paul McLellan

At the recent CadenceLIVE Americas, most of the sessions were pre-recorded with a live Q&A at the end. One exception to this was Big 3D FEM Simulations: Cloud or On-Prem? FEM stands for "finite element method" and is part of the te...
- 21 Jul 2021
カスタムIC／ミックスシグナル: Virtuoso Meets Maxwell: Cadence Learning and SupportポータルのVirtuoso RF Solutionプロダクト・ページ

Custom IC Japan

Virtuoso Meets Maxwell はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC-パッケージ設計環境...
- 20 Jul 2021
カスタムIC／ミックスシグナル: Virtuoso Video Diary: LSCSジョブ制御モード - クラウド・シミュレーションを実現

Custom IC Japan

Virtuoso ADE Assemblerはアナログやミックスシグナルの設計のためシミュレーションを実行する、信頼されたツールとなっています。しかし、大量のシミュレーションを行うような状況では、次のようなことが必要になる場面を目にしたことがあるはずです：数日かかるシミュレーションを実行する必要があり、そしてその間、ICRPプロセスは何をしているのかと考えるジョブ数が増加したときにあらわれるdisplay/IO、その他ランダムなエラーを回避する必要がある設計検証のために数千のスイープ、コ...
- 20 Jul 2021
Verification: Comprehensive Approach to Verification of Interconnect-Centric Systems

DimitryP

Many of today’s SoCs are built around multi-layered, sophisticated interconnect IP components that link together multiple processor cores, caches, memories, and dozens of other IP blocks. These interconnects are enabling new generations of data servers and high-performance mobile devices. Being at the heart of SoCs, they introduce significant challenges to verification engineers both from functional verification and performance…
- 20 Jul 2021
Analog/Custom Design: Virtuosity: Making Optimum Use of Resources in Distributed Farm

Shyam Kumar Gupta

Details on a dedicated tab "Resources" in Job Policy form, which helps to do resource estimation while firing jobs in distributed farms like LSF, SGE, etc
- 20 Jul 2021
Breakfast Bytes: 75 Years of the Microprocessor

Paul McLellan

At the recent ISCA, there was a panel session with some of the major contributors to microprocessor development during the last 50 years. They were also asked to predict how they thought the microprocessor would develop during the next 25 years, goin...
- 20 Jul 2021
Verification: Why IDE Security Technology for PCIe and CXL?

Claire Ying

The new cloud, AI, Analytics, and Edge usage models with exponential data growth and connection drive the evolution of high-bandwidth PCIe (Peripheral Component Interconnect Express) version 5.0 and 6.0, CXL (Computer Express Link) version 2.0 and 3.0. Every component can be envisioned as an attack vector in modern computational systems, especially PCIe and CXL components, which are part of the system HW root-of-trust…
- 19 Jul 2021
Breakfast Bytes: Aerospace and Defense Systems Day...and DAU

Paul McLellan

Coming up on July 28 is CadenceCONNECT Aerospace and Defense Systems Day. Cadence experts will present on the most important issues facing teams in aerospace and defense (A&D). There is a common thread running through the presentations, namely ho...
- 19 Jul 2021
Breakfast Bytes: Sunday Brunch Video for 18th July 2021

Paul McLellan

https://youtu.be/nZ4lisR19nQ Made on my balcony (camera Carey Guo) Monday: Tesla Goes All-In on Vision...and Supercomputers Tuesday: 50 Years of the Microprocessor, Part 1 Wednesday: 50 Years of the Microprocessor, Part 2 Thursday: AWR: Int...
- 18 Jul 2021

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