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Latest Blog Posts

  • 定制IC芯片设计 : Virtuoso视频日记:这根线是怎样连接的?

    sarahfino
    sarahfino
    Virtuoso Schematic Editor L 的Probes工具是连接辅助工具,能满足您识别已存在的连接关系,过滤这些连接关系,并且将探测路径信息存为CSV文件。
    • 17 Jan 2019
  • Breakfast Bytes: IEDM: EUV, the Road to HVM and Beyond

    Paul McLellan
    Paul McLellan
    At IEDM in December, the Sunday preceding the conference proper consists of two short courses, traditionally one logic-related and one memory-related. I always attend the logic one, since that is the most relevant to EDA and the broad semiconductor i...
    • 17 Jan 2019
  • Breakfast Bytes: AlphaZero: Four Hours to World Class from a Standing Start

    Paul McLellan
    Paul McLellan
    Last year I wrote about AlphaZero in my post Deep Blue, AlphaGo, and AlphaZero. A quick recap to jog your memory, or read that earlier post for more detail. Deep Blue was the program developed by IBM that defeated Gary Kasparov at chess in 1997, at t...
    • 16 Jan 2019
  • System, PCB, & Package Design : DesignCon 2019: Is this the Year?

    BillAcito
    BillAcito
    2019 has started --- is this the year of advanced packaging, where system design enablement shifts to the package? If you are attending DesignCon (designcon.com) in Santa Clara, California, in a few weeks, there’s a robust agenda, and it might ...
    • 15 Jan 2019
  • Verification: Verification of ML IP and Specman—Our Hackathon Project

    teamspecman
    teamspecman

    If you are lucky enough and your company spends a few working days each year on a Hackathon, you must know that it is usually a lot of fun. The latest 2018 Hackathon in Cadence was all about Machine Learning. We, in Specman R&D, debated a bit around how to approach the topic since Machine Learning means a lot of different things in our industry. Take a look at the following interesting article: Where ML works bes…

    • 15 Jan 2019
  • Breakfast Bytes: AMD Keynote at CES

    Paul McLellan
    Paul McLellan
    As I said in my post about CES last week (see my post Consumer Electronics: 5G, AI, and Air Taxis), I'm not sure if can read anything into it but the "semiconductor" keynote was given by AMD and not, as historically been the case, Intel...
    • 15 Jan 2019
  • Breakfast Bytes: Tensilica at CES

    Paul McLellan
    Paul McLellan
    Tensilica has been attending CES for many years, before it was acquired by Cadence. The focus used to be on audio processing, with the HiFi family of processors. In fact, as I said in my preview post for this year's CES (see CES Preview), we now...
    • 14 Jan 2019
  • Analog/Custom Design: Accurate Pin-to-Pin Resistance Modeling for Wide, Slotted Metal Structures Using Advanced Adaptive Mesh Extraction Technology in Quantus

    Shritam
    Shritam

    In Analog/RF layouts, designers frequently use slotted metal structures. Such slotting is done either to satisfy DRC requirements from foundries to satisfy max. density rule criteria, or to reduce eddy current losses in return paths of a transmission line/coiled spiral inductor. Current flow in such slotted metal structures is non-uniform, hence, traditional parasitic extraction approaches with predefined fracture length…

    • 11 Jan 2019
  • Breakfast Bytes: Gordon Moore Killed the Oakland Tribune

    Paul McLellan
    Paul McLellan
    The Oakland Tribune closed down in 2016. It remains to be seen if the San Jose Mercury or the San Francisco Chronicle follows. There are lots of plausible stories as to why this happened. I think two of the most significant are Craigslist, and t...
    • 11 Jan 2019
  • Breakfast Bytes: Consumer Electronics: 5G, AI, and Air Taxis

    Paul McLellan
    Paul McLellan
    I'm sure you've heard the great marketing catchphrase that "What happens in Vegas, stays in Vegas." Well, this week it is the Consumer Electronics Show, better known by its initials, CES. About 4,000 exhibitors are hoping that ...
    • 10 Jan 2019
  • Analog/Custom Design: Virtuosity: Saving Time, Effort, and Money with Express Pcells

    Pallabi R
    Pallabi R
    Use the Express Pcell feature and see for yourself how you can save time, effort, and money!
    • 10 Jan 2019
  • Breakfast Bytes: SiFive: The Magnificent Seven

    Paul McLellan
    Paul McLellan
    At least for now, I think that the most significant of the RISC-V processor companies is SiFive. There are two reasons for this: they started first, and they are an IP licensing company (as well as a chip company), not someone creating an implementat...
    • 9 Jan 2019
  • Breakfast Bytes: Breakfast Nibbles: Predictions for 2019

    Paul McLellan
    Paul McLellan
    It is the start of the year, so time to provide my predictions for 2019. These are the topics that I expect I will spend a lot of time writing about this year. Let's start with the big picture, and work down to the small (do we call it a 30&Aring...
    • 8 Jan 2019
  • Breakfast Bytes: 2018: A Year of Breakfasts

    Paul McLellan
    Paul McLellan
    It's the start of a new year. Tomorrow, I'll pick out what I think that the big trends for 2019 are going to be. But today, let's take a look at how my predictions for 2018 fared from my post Nibbles: Breakfast Bytes Predictions for 2018....
    • 7 Jan 2019
  • Breakfast Bytes: Sunday Brunch Video for 8th January 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/tAMYvJJcPy0 Made at Vieira Park, San Jose (camera Carey Guo) Wednesday: 150th Anniversary of the Periodic Table of the Elements Thursday: IEDM: The World After Copper Friday: RISC-V Cores: SweRV and ET-Maxion www.breakfastb...
    • 6 Jan 2019
  • Breakfast Bytes: RISC-V Cores: SweRV and ET-Maxion

    Paul McLellan
    Paul McLellan
    December was the first RISC-V summit at the Santa Clara Convention Center. I covered that in my post RISC-V: Real Products in Volume. The one-sentence summary of the state of RISC-V is that it is already dominant in academia, and has some traction w...
    • 4 Jan 2019
  • Digital Design: Glitch Noise Analysis and Fixing with Tempus

    Marc Swinnen
    Marc Swinnen
    Every design engineer knows something about glitch but for many the details are a little fuzzy, especially since the topic has recently evolved well beyond the original, simple analysis. I will use this posting to sketch a quick overview of the state...
    • 3 Jan 2019
  • Breakfast Bytes: IEDM: The World After Copper

    Paul McLellan
    Paul McLellan
    I remember Gary Patton, the CTO of GLOBALFOUNDRIES, telling me once that research seemed to have flipped, and whereas he used to have most people working on transistors and interconnect was an afterthought, now it was the other way around. Just scali...
    • 3 Jan 2019
  • Breakfast Bytes: 150th Anniversary of the Periodic Table of the Elements

    Paul McLellan
    Paul McLellan
    Happy New Year, and welcome to another year of Breakfast Bytes. This year is the 150th anniversary of the periodic table of the elements. That's the table that would have been on the wall somewhere when you took any chemistry lessons. There's...
    • 2 Jan 2019
  • Breakfast Bytes: Sunday Brunch Video for 1st January 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/my0o9-PD-a8 Made at the Cadence EBC (camera Sean) Monday: CES Preview Tuesday: The Economist on Silicon Supremacy Wednesday: The Breakfast Bytes Guide to Flying Thursday: Top 10 Hotel Pet Peeves Friday: Off Topic: Are You S...
    • 1 Jan 2019
  • Verification: Renesas Brings Their Legacy Testbench Up to Speed Using the Cadence Verification Suite

    XTeam
    XTeam

    Recently, Renesas Electronics Corporation faced a challenge. They were developing a new data conversion block, one that included an AHB bus bridge, which would be attached to a pre-existing DMA IP core. There was also a complicated finite state machine involved in this new block. Renesas didn’t have a whole lot of time on their hands—they needed a quick turnaround time, but only had a limited amount of engineers to accomplish…

    • 24 Dec 2018
  • Breakfast Bytes: Silent Night

    Paul McLellan
    Paul McLellan
    Happy Christmas from Breakfast Bytes. It's Christmas Eve 2018, and 200 years ago today, Christmas Eve 1818, was the first performance of Silent Night, although since this was Oberndorf, Austria, it was in German, Stille Nacht. You may know the s...
    • 24 Dec 2018
  • Digital Design: Patterns, a Unified Language between Design and Manufacturing

    Philippe Hurat
    Philippe Hurat
    There will be no design without manufacturing and manufacturing is mainly about patterns and patterning. Without proper transfer of the design patterns to silicon, there would be no semiconductor product. So, it’s with no surprise that several ...
    • 23 Dec 2018
  • PCB、IC封装:设计与仿真分析: DDR5的时代已经到来

    SDA China
    SDA China
     本文翻译自Cadence “Breakfast Bytes” 专栏作者Paul McLellan文章"DDR5 Is on Our Doorstep"。 space 现在DRAM市场上的谈论热点是DDR5。很多人可能以为JEDEC已经确定了其标准,但实际上它在技术上仍处于开发阶段。我认为最终的DDR5标准有望在年底前出台。 在台积电的OIP生态系统论坛上,Cadence的Marc Greenberg和Micron(美光)的 Ryan Baxter就DDR5的挑...
    • 21 Dec 2018
  • The India Circuit: 7 Trends We Saw In 2018

    Madhavi Rao
    Madhavi Rao
    I did at 2017 retrospective last year and looking back at 2018 there was a lot that happened that is worth recapping. So here is my 2018 retrospective. 1. The semiconductor industry did well in 2018 According to the Semiconductor Industry Association...
    • 21 Dec 2018
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