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Computational Fluid Dynamics: Women in CFD with Mary Alarcón Herrera

Veena Parthan

The eighth edition of the Women in CFD series features Mary Alarcon Herrera, a product engineer for the Cadence Computational Fluid Dynamics (CFD) team. Read our conversation with Mary as she shares insights on her career journey, her thoughts on women in engineering, and her advice for anyone interested in pursuing a career in CFD.
- 25 Sep 2023
カスタムIC／ミックスシグナル: Start Your Engines: ミックスシグナルシミュレーションでTclコマンドをより効果的に使う

Custom IC Japan

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Engines! ブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。シミュレーション中...
- 25 Sep 2023
Analog/Custom Design: Virtuoso Studio: In-Design Verification with iPegasus

Vinod Khera

By Olivier Arnaud, Product Engineering Group Director, Cadence. Today's complex SoC designs, especially at advanced nodes, significantly increase layout creation and verification time. To meet overall demand for faster design cycle turnaround time, bridge a demand gap, and improve productivity between custom implementation and physical verification tools, Cadence Virtuoso InDesign DRC, part of the overall physical verification…
- 25 Sep 2023
Analog/Custom Design: Virtuoso Studio: iPegasus for Signoff DRC and Fill

JentilTom

The semiconductor world is evolving. The number of design rules is increasing, and the verification load is exploding. In-design 'signoff quality' verification is the need of the hour. The Virtuoso Studio attains that with the latest iPegasus DRC and Fill feature, accelerating overall design turn-around time.
- 22 Sep 2023
Artificial Intelligence (AI): Learn How Labforge Is Bringing AI into Vision Systems

Tanushri Shah

Labforge is a Waterloo, Ontario-based company that designs, builds, and manufactures smart cameras used in industrial automation and defense applications. By bringing artificial intelligence (AI) into their vision systems with Cadence, they can autom...
- 21 Sep 2023
Corporate News: DAC Celebrates Its 60th Anniversary

Reela Samuel

The Design Automation Conference (DAC) recently celebrated its 60th anniversary in San Francisco with an outstanding lineup of speakers and presentations. Academic, research, government, and industry attendees participated in robust research and eng...
- 21 Sep 2023
Computational Fluid Dynamics: AESIN TECH TALK: Accurate Electro-Thermal Simulation for Thermal Management of Electric Drivetrain

Veena Parthan

In this AESIN TECH TALK, Matt Evans, Principal Product Engineer at Cadence, will discuss the thermal management of electric drivetrains, the importance of thermal simulation, and the role of Celsius EC Solver in this process.
- 20 Sep 2023
Computational Fluid Dynamics: Discover What’s New in Fine Marine CFD

AnneMarie CFD

The newest version of Fine Marine offers critical enhancements that improve solver performances and sharpen the C-Wizard’s capabilities even further. Check out the highlights...
- 20 Sep 2023
Data Center: Sustainable Design of Data Centers Using Cadence Reality DC

Veena Parthan

In the CadenceLIVE Silicon Valley presentation on From Chips to Chillers: Electronics Cooling Through to Sustainability, Sherman Ikemoto, System Sales Group Director for the Cadence Digital Twin platform, discusses the sustainable methods for electronics cooling using Cadence tools.
- 20 Sep 2023
System, PCB, & Package Design : BoardSurfers: Creating GUIs Using Allegro SKILL

Kirti Sikri

The Allegro SKILL coding language offers capabilities to create user-friendly graphical user interfaces (GUIs) for an enhanced user experience. The extensive collection of Allegro SKILL widgets enables the creation of sophisticated GUI components for...
- 19 Sep 2023
Artificial Intelligence (AI): Renesas Collaborates on Large Language Model Generative AI Chip Design

Steve Brown

Renesas and Cadence have been collaborating for several years, combining their expertise to drive advancements in chip design. Their partnership has been instrumental in creating innovative solutions that address the complex challenges faced by chip ...
- 19 Sep 2023
Academic Network: Academic and Entrepreneur Tracks at CadenceLIVE Europe 2023

Anton Klotz

I am very happy to announce that registration for the in-person CadenceLIVE Europe user conference has opened! The conference will be hosted in Munich at a new venue, the Holiday Inn, from October 10 to 11. In the very unlikely case that you have s...
- 18 Sep 2023
Analog/Custom Design: How Much Do You Know About Virtuoso Studio?

NaomiM

How much do you know about Virtuoso Studio? Here are the answers to the True or False questions we’re listing each week on Cadence social media channels. Watch for a new question every Friday in 2023.

Learn more about Virtuoso Studio’s advantages. Cadence Virtuoso Studio is our next-generation custom design platform delivering an optimal design experience that meets today's and future custom analog design needs…
- 15 Sep 2023
Verification: Verification of Integrity and Data Encryption (IDE) for CXL Devices

Sangeeta Soni

In continuation of our series on IDE blogs, Why IDE Security Technology for PCIe and CXL? and Verification of Integrity and Data Encryption(IDE) for PCIe Devices, this blog focuses on IDE verification considerations for CXL devices.

With increasing trends of AI, ML, and deep learning in the computing space, there is a focus on security features for SoCs catering to high performance computing (HPC), data analytics, automotive…
- 14 Sep 2023
カスタムIC／ミックスシグナル: Spectre Tech Tips: Spectre FMC Analysisのご紹介

Custom IC Japan

プロセスが微細化するにつれて、デバイスのミスマッチが回路性能に与える影響は大きくなり、現在では、このミスマッチが性能指標に与える影響を解析するために、さらに多くのモンテカルロ・シミュレーションが必要とされています。標準的なモンテカルロ・アルゴリズムでは、メモリ設計において4σの歩留まりを決定するために必要な100万回のモンテカルロ・シミュレーションを行うことすら不可能（高コスト）です。高シグマ歩留まり解析に10億回以上のシミュレーションが必要なことは明らかです。 Spectre FM...
- 13 Sep 2023
Learning and Support: From Learners to Innovators: Inside Cadence’s Certified Training Partner Program

VNelson

The news is replete with stories of a global shortage of engineers, which is only getting more acute. According to the US Bureau of Labor Statistics projections, by 2032, US STEM occupations will grow by about 1 million. Additionally, several governm...
- 13 Sep 2023
定制IC芯片设计 : Virtuosity: Virtuoso Design Intent支持多语言注释

Mate Zamori

ICADVM20.1 ISR20 开始，用户可以使用普通话、日语、印度语等非拉丁字符的语言来编写 Design Intent 中的注释。
- 13 Sep 2023
Computational Fluid Dynamics: Automatically Generate the Best Mesh Each Time with Adaptive Grid Refinement

Veena Parthan

The goal of simulation preprocessing is to create a mesh that is suitable for the analysis. We aim for computational efficiency when generating a mesh while resolving geometry and physics. Automated adaptive grid refinement feature in Fidelity Pointwise manages numerical errors, adheres to user-defined boundaries, and resolves all flow features for diverse applications.
- 13 Sep 2023
Digital Design: Training Webinar: A Revolutionary Approach to Optimizing Chip Design

FormerMember

Please join me, Cadence Training and Application Engineer Krishna Atreya, for this free technical Training Webinar.
What Is the Webinar About?
The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, machine learning-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and Cadence Cerebrus intelligently optimizes the Cadence digital full flow to meet power,…
- 12 Sep 2023
Analog/Custom Design: Start Your Engines: Use Tcl to Save Signals More Efficiently in AMS Simulations

Qingyu Lin

For large SoC designs, the simulation performance might get impacted by the number of signals being saved. Therefore, a crucial part of simulation setup is to specify the signals to be saved. View this blog to know more on how you can use Tcl commands to save signals more efficiently.
- 12 Sep 2023
Artificial Intelligence (AI): Cadence CEO Unveils Exciting LLM GenAI Breakthrough for Chip Design

Corporate

In a recent keynote address, Dr. Anirudh Devgan, president and CEO of Cadence, shared groundbreaking insights into the future of generative AI (GenAI) for semiconductor and system design. With a focus on artificial intelligence (AI), 3D-IC, and digit...
- 12 Sep 2023
Corporate News: INEOS Britannia Is Designing for the Next America's Cup with Cadence

SarahAdams

As teams gear up for the 37th edition of the America's Cup, the pressure is on to design the fastest race boat possible. At INEOS Britannia, they are partnering up with the best in the industry to achieve their goal of winning the competition. W...
- 12 Sep 2023
Verification: The Crucial Need for Synchronization with Third-Party Systems

Anika Sunda

In today’s interconnected world, businesses and organizations rely heavily on various software applications and systems to streamline their operations, manage data, and facilitate collaboration. Many companies use specialized tools like IBM DOORS and Jama to handle complex requirements management and project development. While these systems offer robust capabilities individually, the need for synchronization with third…
- 12 Sep 2023
System, PCB, & Package Design : Training Webinar: Celsius Thermal Solver - Recording Available

Vince Kim

The Cadence Celsius Thermal Solver is the industry’s first complete electrothermal co-simulation solution for the full hierarchy of electronic systems from ICs to physical enclosures. Utilizing innovative multiphysics technology, Celsius Thermal Solver enables complete system analysis by combining finite element analysis (FEA) for solid structures with computational fluid dynamics (CFD) for fluids. The Training Byte webinar…
- 11 Sep 2023
Corporate News: Cadence Creates Industry’s First LLM Technology for Chip Design

Steve Brown

In the nine short months since OpenAI brought ChatGPT (a Chat Generative Pre-Trained Transformer) and the phenomenal concept of large language models (LLMs) to the global collective consciousness, pioneers from every corner of the economy have raced ...
- 11 Sep 2023

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