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Latest Blog Posts

  • Common Tensilica Software Stack Delivers Best-In-Class Edge AI Performance

    Artificial Intelligence (AI): Common Tensilica Software Stack Delivers Best-In-Class Edge AI Performance

    TIP SMitra
    TIP SMitra
    Developing an agile software stack is important for successful AI deployment on the edge. We regularly encounter new machine learning models created from multiple AI frameworks that leverage the latest primitives and state-of-the-art ML model topolog...
    • 11 Sep 2023
  • 如何在封装设计中创建并使用非圆形过孔堆叠?

    PCB、IC封装:设计与仿真分析: 如何在封装设计中创建并使用非圆形过孔堆叠?

    TeamAllegro
    TeamAllegro
    要设计出尺寸更小的电子器件,可以在多层基板或多层印刷电路板 (PCB) 中采用高密度设计,增加每层的使用率。在多层封装或多层电路板的设计和制造过程中,过孔的作用不可或缺。我们需要使用过孔或电镀过孔来实现从一层到另一层的布线。虽然也可以使用通孔或盲孔,但这两种孔占用了过多的空间,使得复杂和高密度电子器件难以布线。要解决这个问题,可以使用堆叠的过孔,即两个或两个以上的分层过孔彼此堆叠在一起。 在本文中,我们将借助 Allegro Package Designer Plus 工具,探讨如何在高密度复杂...
    • 10 Sep 2023
  • CadenceTECHTALK: Solution for 3D-IC Interposer Signal Integrity

    System, PCB, & Package Design : CadenceTECHTALK: Solution for 3D-IC Interposer Signal Integrity

    Tanushri Shah
    Tanushri Shah

    3D-IC design requires early analysis of thermal properties, power delivery, and signal integrity. This CadenceTECHTALK goes through the process of simulating heterogeneously integrated chiplets. You’ll be able to learn about the integrated workflow that begins with silicon design data being accurately modeled with 3D FEM extraction.

    A slide from the CadenceTECHTALK titled 'From the Chip Through to the System'

    Gary Lytle, product manager director at Cadence, talks about Cadence’s multiphysics…

    • 10 Sep 2023
  • CadenceLIVE Taiwan 2023 感謝有您、圓滿落幕!

    Spotlight Taiwan: CadenceLIVE Taiwan 2023 感謝有您、圓滿落幕!

    candyyu
    candyyu
    半導體與 EDA年度盛會 - CadenceLIVE Taiwan 使用者大會在8月31日圓滿落幕。匯聚超過40場技術趨勢演講、涵括 6大技術分場與成功案例、串聯近20家產業學界專家,共同探討高科技產業熱門議題和前瞻趨勢!今年適逢Cadence成立35周年,讓打造各領域精英交流平台的CadenceLIVE Taiwan更別具意義。為此,今年大會聚焦「機器學習與數位流程」、「類比混合訊號設計」、「系統級軟硬體驗證」、「多重物理系統設計與設計與分析」、「3D-IC解決方案」、「IP與車用解決方案」等...
    • 10 Sep 2023
  • Generative AI in Design Tools: Solving the Engineering Productivity Crisis

    Corporate News: Generative AI in Design Tools: Solving the Engineering Productivity Crisis

    Steve Brown
    Steve Brown
    People are adopting more and more technologies like AI into their lives. New intelligent devices are fueling growth in our economy. Meanwhile, there’s a huge talent gap of highly trained or even entry-level electronic engineers to design next-g...
    • 8 Sep 2023
  • DEI@Cadence: Why Words Matter for One Cadence—One Team

    Life at Cadence: DEI@Cadence: Why Words Matter for One Cadence—One Team

    David Junkin
    David Junkin
    Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you’ll find a community where employees share their perspectives and experiences. By provi...
    • 8 Sep 2023
  • finot-conq Is Designing Award-Winning Yachts with Fidelity Fine Marine

    Corporate News: finot-conq Is Designing Award-Winning Yachts with Fidelity Fine Marine

    Tanushri Shah
    Tanushri Shah
    For over 50 years, finot-conq has been at the forefront of the yacht design industry, and over 45,000 boats have been produced from finot-conq designs, including production boats, cruising boats, and racing prototypes. In the past 15 years, their pro...
    • 7 Sep 2023
  • AI PCB Design: ジェネレーティブAIが我々をコンストレイントから可能性へと導く方法

    PCB設計/ICパッケージ設計: AI PCB Design: ジェネレーティブAIが我々をコンストレイントから可能性へと導く方法

    SPB Japan
    SPB Japan
    ジェネレーティブAI(または生成AI)は、PCB設計における次の大きな一歩を示します。  もちろん、この言葉は期待通りのものでしょう。2023年はジェネレーティブAIの台頭に支配された年であり、大規模言語モデル(LLM)はそのまぎれもなく代表的な存在です。理由は簡単です。LLMは、一見、知覚としての要件を満たしているように見えるのです。ただ、実際には、過去のデータとリアルタイムのデータの両方から文脈を推定するのが非常にうまいだけなのですが。  “ジェネレーティブA...
    • 7 Sep 2023
  • Training Webinar: Microwave Office: An Integrated Environment for RF and Microwave Design

    RF Engineering: Training Webinar: Microwave Office: An Integrated Environment for RF and Microwave Design

    John Dunn
    John Dunn
    A recording of a training webinar on Microwave Office is available. Topics show the design environment, with special emphasis placed on electromagnetic (EM) simulation. Normal 0 false false false EN-US JA X-NONE .…
    • 6 Sep 2023
  • Reutlingen University Certified as Cadence Academic Network Lab

    Academic Network: Reutlingen University Certified as Cadence Academic Network Lab

    Anton Klotz
    Anton Klotz
    Let’s start with a confession: Reutlingen is not the most famous city in Germany, not even in the top 10. It’s a mid-sized town in the vicinity of Stuttgart, close to the Swabian Alps, and, according to the Guinness Book of Records, it ha...
    • 6 Sep 2023
  • Cadence TECHTALK - Efficient Thermal Management for Enhanced Electronics Performance​

    Computational Fluid Dynamics: Cadence TECHTALK - Efficient Thermal Management for Enhanced Electronics Performance​

    Veena Parthan
    Veena Parthan
    Come join our one-hour session to discover how the Celsius EC Solvers utilizes data to analyze natural convection, forced convection, liquid cooling, and solar cooling. This results in increased accuracy and faster simulation time when modeling electronic equipment. Don't miss out on this opportunity to enhance your knowledge!
    • 5 Sep 2023
  • Virtuoso Meets Maxwell: Custom Passive Device Authoring – パート 2 (LVS)

    カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: Custom Passive Device Authoring – パート 2 (LVS)

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell'はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC-...
    • 5 Sep 2023
  • Introducing PCIe's Integrity and Data Encryption Feature (IDE)

    Verification: Introducing PCIe's Integrity and Data Encryption Feature (IDE)

    Felipe Goncalves
    Felipe Goncalves

    The Integrity and Data Encryption (IDE) was published in PCIe (Peripheral Component Interconnect Express) version 6.0, and it was created as a tool to protect the communication between the different devices of the PCIe topology root complex (RC), switch (SW), and endpoint (EP). The IDE layer is a new layer that was inserted between the transection layer and data link layer with the goal of protecting against threats from…

    • 5 Sep 2023
  • AI PCB Design: How Generative AI Takes Us from Constraints to Possibilities

    Corporate News: AI PCB Design: How Generative AI Takes Us from Constraints to Possibilities

    Michael Jackson
    Michael Jackson
    Generative artificial intelligence (AI) represents the next great step forward in PCB design. This is, of course, what you might expect me to say. 2023 has been a year dominated by the rise of generative AI, with large language models (LLMs) as the u...
    • 5 Sep 2023
  • Unraveling the PCIe.6.0 Compliance Feature

    Verification: Unraveling the PCIe.6.0 Compliance Feature

    sabnams
    sabnams

    In PCI Express (PCIe) devices, there is a need for testing near-worst-case inter-symbol interference (ISI) and cross-talk so as to ensure data flow with minimal distortion and noise. To accommodate this in PCIe, we have a separate LTSSM state as polling.compliance state. This phase will generate patterns named compliance pattern, modified compliance pattern, jitter pattern, and toggle pattern (a new feature added in PCIe…

    • 5 Sep 2023
  • Fidelity CFD Technology Update Part I – Aerospace Design

    Computational Fluid Dynamics: Fidelity CFD Technology Update Part I – Aerospace Design

    Veena Parthan
    Veena Parthan
    There are always a few tricks and tips for an easy yet effective solution to a design problem. For aerospace applications, this is no different! This blog post will delve into the meshing tools and solvers integrated within the Cadence Fidelity CFD platform that can ease your next aerospace design.
    • 4 Sep 2023
  • System Analysis Knowledge Bytes: Using PowerDC for Multi-Board IR Drop Analysis

    System, PCB, & Package Design : System Analysis Knowledge Bytes: Using PowerDC for Multi-Board IR Drop Analysis

    Jasmine
    Jasmine
    This blog is about performing IR Drop analysis on a multi-board package using PowerDC. It lists the steps to set up the simulation and view the simulation results. References to the RAK on Multi-Board IR Drop Analysis using PowerDC are included.
    • 4 Sep 2023
  • Labforge Brings AI into Vision Systems with Cadence

    Corporate News: Labforge Brings AI into Vision Systems with Cadence

    Reela Samuel
    Reela Samuel
    Labforge, a company based in Waterloo, Ontario, designs, builds, and manufactures smart cameras used in industrial automation and defense applications. Their flagship product, the Bottlenose smart camera, is a low-power device that can process compu...
    • 31 Aug 2023
  • Spectre Tech Tips: Introducing Spectre FMC Analysis

    Analog/Custom Design: Spectre Tech Tips: Introducing Spectre FMC Analysis

    Jianhe Guo
    Jianhe Guo
    The Spectre FMC Analysis uses advanced statistical and machine learning (ML) techniques to achieve the same accuracy as the Brute Force Monte Carlo method with the minimum number of Monte Carlo simulations. This blog describes how to set up and run FMC analysis in Spectre standalone mode.
    • 31 Aug 2023
  • Voltus Voice: Multi-Chiplet Marvels - Stepping into the 3D-IC Signoff Realm

    Digital Design: Voltus Voice: Multi-Chiplet Marvels - Stepping into the 3D-IC Signoff Realm

    Louis Tsai
    Louis Tsai
    Read this blog to understand how the Voltus 3D-IC power and IR signoff flow helps to verify the overall power grid logical connectivity and IR/EM performance of the complete system.
    • 31 Aug 2023
  • Virtuoso Studio: デザイン、プランニング、解析 – コインの3つの側面、エピソード1

    カスタムIC/ミックスシグナル: Virtuoso Studio: デザイン、プランニング、解析 – コインの3つの側面、エピソード1

    Custom IC Japan
    Custom IC Japan
    当社の新しい AI 搭載カスタム設計ソリューション Virtuoso Studio は、我々の30年にわたる業界の知識とリーダーシップを活用し、革新的な機能、比類のない生産性を実現する再構築されたインフラストラクチャ、および従来の設計の枠を超えた新しいレベルの統合環境を提供します。このブログシリーズでは、最高のアナログ設計ツールがどのように改良され、困難な設計課題に対応できるようになったかを紹介します。 Design Planning and Analysis ツールは、Virtuoso Lay...
    • 30 Aug 2023
  • Power Up Your Low-Power Verification - A Quick Overview

    Verification: Power Up Your Low-Power Verification - A Quick Overview

    Tyler Sherer
    Tyler Sherer

    Handheld devices have evolved immensely over the past decade. Today's smartphones, with their intricate arrays of sensors and computational power, far surpass their predecessors in complexity. These modern devices rival the capabilities of past supercomputers. When you factor in the intricate power management demanded by battery constraints, verifying these devices becomes a uniquely challenging task.

    The complexity of low power verification

    Figure 1: The…

    • 30 Aug 2023
  • Virtuoso Meets Maxwell: Virtuoso Electromagnetic Solver Assistant - 繰り返しインスタンスのサポート

    カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: Virtuoso Electromagnetic Solver Assistant - 繰り返しインスタンスのサポート

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell'はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC-...
    • 29 Aug 2023
  • Best Practices to Achieve the Highest Performance Using Cadence Xcelium Logic Simulator – Part 3

    Verification: Best Practices to Achieve the Highest Performance Using Cadence Xcelium Logic Simulator – Part 3

    Reela Samuel
    Reela Samuel

    Our previous posts in this series covered measuring parameters, switches, and profiling, as well as performing profile analysis. In this final post will examine how to analyze a basic profiler report. This includes examining the stream count, identifying the most active modules, and reviewing the summary section. Additionally, we will discuss techniques for optimizing settings and managing access levels.

    Analyzing Basic…
    • 28 Aug 2023
  • 4th Generation Intel Xeon Scalable Processors for Faster Fidelity CFD Computations

    Computational Fluid Dynamics: 4th Generation Intel Xeon Scalable Processors for Faster Fidelity CFD Computations

    JoshuaS
    JoshuaS
    The Intel® Xeon® processor family has long been a popular choice for CFD hardware, both in workstations and in HPC clusters. The Intel® Xeon® processor Scalable family in particular is targeted at HPC applications, where it has b...
    • 28 Aug 2023
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