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Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Analog/Custom Design

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
• 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso
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Blog - Post List

Latest blogs

Breakfast Bytes

How to Pitch a Journalist

In the early part of my career, I was an engineer or an engineering manager. Then…

• 7 min read
journalism , marketing

Whiteboard Wednesdays

Whiteboard Wednesdays - Von Neumann's 5 Bottlenecks and CCIX - Part 2

In this week's Whiteboard Wednesdays video, Tom Hackett completes the story of the…

• less than a min read
Whiteboard Wednesdays , ccix , cloud

Verification

Tales from DAC: How Altia Systems Used Xcelium to Bring New Life to Virtual Meet…

We’re going to take a wild guess and say you’ve been in a meeting before. Maybe it…

• 2 min read
Functional Verification , DAC 2018 , Altia Systems , xcelium

Breakfast Bytes

GLOBALFOUNDRIES' CTO State-of-the-Roadmaps

At SEMICON I got to sit down with Gary Patton, the CTO of GlobalFoundries. They have…

• 8 min read
22fdx , 12fdx , gary patton , FinFET , GlobalFoundries , FD-SOI

Breakfast Bytes

Dave Patterson on Becoming a Computer Scientist...and Going Directly to Happines…

At SEMICON West, Dave Patterson (center) sat down for an interview with author John…

• 6 min read
turing award , RISC , UC Berkeley , dave patterson

Breakfast Bytes

Turning Fixed Costs into Variable Costs: Foundries and Clouds

One trend that has been accelerating for a couple of decades is turning fixed costs…

• 6 min read
EDA , cloud , cadence cloud , mobile , fixed cost

Breakfast Bytes

Breakfast Bytes Guide to Armenia

Every summer for a week I go hiking with a group of friends. We used to just go to…

• 9 min read
yerevan , genocide , khachkar , armenia , Virage Logic

System, PCB, & Package Design 

EE Thermal 101 – Thermal Basics for Electrical Engineers (Part 2 of 4)

In part 1 of this blog series we discussed the duality between the electrical and…

• 5 min read
EE Thermal , temperature , Thermal Basics , Heat transfer , PowerDC

Breakfast Bytes

What's For Breakfast? Video Preview July 30th to August 3rd 2018

https://youtu.be/HoEoMWal_48 Coming from DARPA ERI Summit at Palace of Fine Arts…

• less than a min read
interconnect , cfet , imec , cadence cloud , xcelium , GlobalFoundries , simulation , dave patterson

Breakfast Bytes

Trends, Technologies, and Regulations in China's Auto Market

At "Ludwigsburg", officially the International Autombil Elektronik Kongress, there…

• 5 min read
Automotive , China , volkswagen

Whiteboard Wednesdays

Whiteboard Wednesdays - Von Neumann's 5 Bottlenecks and CCIX - Part 1

In this week's Whiteboard Wednesdays video, Tom Hackett traces the evolution of the…

• less than a min read
Whiteboard Wednesdays , ccix

Breakfast Bytes

Cadence Is MAGESTIC

Today at the Electronic Resurgence Initiative (ERI) Summit in San Francisco, DARPA…

• 4 min read
magestic , idea , electronic resurgence initiative , posh , eri , darpa

Verification

Tales From DAC: How Syntiant Went From Zero to Tapeout in Six Months

Here’s something to chew on: Syntiant is an AI startup involved in deep learning…

• 2 min read
DAC , Functional Verification , syntiant , DAC 2018 , cadence cloud

Breakfast Bytes

Nicolas's Recipe for Digital Marketing in EDA

This is the third (and final) post about the ESD Alliance workshop on digital marketing…

• 5 min read
digital marketing , esd alliance

Verification

Perspec Portable Stimulus Hands-On Workshop at DAC 2018

Cadence pulled a fast one at DAC 2018, almost like a bait and switch. We advertised…

• 1 min read
Perspec , AMIQ , pss , portable stimulus

Breakfast Bytes

What's For Breakfast? Video Preview July 23rd to 27th 2018

https://youtu.be/KwrfcMtbMDM Coming from CDNLive Japan (camera Asushi Tanaka)…

• less than a min read
Automotive , China , cloud , digital marketing , armenia , onespin , foundry

Breakfast Bytes

CDNLive Japan: 対応ポートフォリオ

As I said on Monday, I am in Japan this week for CDNLive. I haven't been in Japan…

• 6 min read
cdnlive japan , CDNLive , cadence cloud

Breakfast Bytes

Sigrity 2018—Into the 3rd Dimension

Cadence has talked about System Design Enablement for the last few years, taking…

• 5 min read
Tom Beckley , CDNLive , Signal Integrity , Sigrity , thermal , Breakfast Bytes

Breakfast Bytes

Toshiba Electronic Devices & Storage Corporation and Interconnect Workbench

I recently talked with Mr Takizawa of Toshiba Electronic Devices & Storage Corporation…

• 4 min read
iwb , Interconnect Workbench , tdsc , Toshiba
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