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Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Analog/Custom Design

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
• 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso
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Blog - Post List

Latest blogs

Analog/Custom Design

Virtuosity: Things I Learned in August and September 2015 by Browsing Cadence Online…

Cadence Online Support Features Setting the Release Preferences for your search…

• 5 min read
AMS , ADE , spectreRF , Liberate , PVS , Custom IC Design , XLME

Digital Design

Performance, Power, Area. It's All You Need to Know—or Is It?

Whether it's in a technical paper, a pundit's article, or a live discussion with…

• 2 min read
High-Level Synthesis , PPA , Stratus , SystemC , HLS

SoC and IP

Lowering Energy Consumption in Always-on IoT Designs

As a lead design engineer on the Tensilica R&D team, Dr. Avinash Lingamneni certainly…

• 5 min read
Low Power , always on , IoT , wearable , Tensilica , mobile

Breakfast Bytes

I've Got My Personal Portable Communications Equipment. But Where's My Hoverboard…

You have probably seen the Back to the Future trilogy. In Back to the Future II Marty…

• 3 min read
electronics , moore's law , hoverboard , Marty McFly , Back to the Future

Whiteboard Wednesdays

Whiteboard Wednesdays—Cadence IP Solution for USB Type-C

In this week’s Whiteboard Wednesdays video, Jacek Duda talks about the components…

• less than a min read
DSP , Whiteboard Wednesdays , IP , DisplayPort , USB , Tensilica , Xtensa , Type-C , multi-protocol

Verification

MIPI CSI-2—What's Cooking with the Most Popular Mobile Camera Interface?

The MIPI CSI-2 (Camera Serial Interface) specification is celebrating its tenth birthday…

• 2 min read
Verification IP , MIPI Alliance , IoT , VIP , MIPI , CSI

Breakfast Bytes

One Connector to Rule Them All: USB Type-C

The original USB connector seems to be the only connector where it is always the…

• 5 min read
USB Type-C , DisplayPort , USB , IP subsystem

Breakfast Bytes

IEEE Elects EDA Professional as President

When I lived in England, newspapers had a tradition of not mentioning other newspapers…

• 4 min read
Karen Bartleson , EDA standards , Electronic design , IEEE

Breakfast Bytes

Weekly News—October 16, 2015

Largest Tech Merger Ever Earlier in the year Avago announced that it was acquiring…

• 2 min read
Intel , Dell , 5nm test chip , imec , EMC , Qualcomm , Breakfast Bytes , Weekly News

Breakfast Bytes

Goldilocks and the Three Ways

The two obvious ways to implement a complex algorithm are to write a large amount…

• 4 min read

Breakfast Bytes

Memory and Storage: the Wall is Coming Down

It was MemCon this week. Three keynotes, three parallel tracks each with four presentations…

• 4 min read
IP , Memory , MemCon , storage , DRAM , flash memory

Breakfast Bytes

Rules for Radicals: Practical Advice for Adopting Formal

This year's Jasper User Group conference finished up with a dose of realism in a…

• 4 min read
Jasper User Group , JUG , formal , PMC Sierra , Imagination , Jasper , broadcom , Qualcomm , Paul's Posts , Formal verification

Whiteboard Wednesdays

Whiteboard Wednesdays—Automotive IP Subsystems

In this week's Whiteboard Wednesdays video, Charles Qi takes a closer look at IP…

• less than a min read
Automotive , Whiteboard Wednesdays , IP , subsystem

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Symbol Editor? 16.6 Has a Couple of New Enhancements…

The Allegro PCB Editor release has a few new capabilities related to symbol pins…

• 1 min read
Allegro GUI , Allegro 16.6 , SPB , PCB Editor , PCB design , Grzenia , Allegro PCB Editor , library , Allegro

SoC and IP

Cadence Ports LPDDR4/DDR4 Combo PHY to TSMC 28HPC to Serve Rapid Adoption in Consumer…

Rapid consumer product revolution continues to be enabled by semiconductor technology…

• 1 min read
DDR4 , LPDDR4 , MemCon , LPDDR , DDR , DDR3 , LPDDR3

Breakfast Bytes

Batterygate, the Scandal that Isn't

If you think power isn’t important then you must have been living under a rock for…

• 5 min read
Apple , Samsung , TSMC , Paul's Posts , power

Breakfast Bytes

Thanks for the Memory: How MemCon Got Started

It is MemCon on Tuesday. I talked to David Lin to find out how it all started. He…

• 3 min read
DDR2 , Memory , DDR4 , MemCon , flash , JEDEC , NAND flash , ddrx , DRAM , nor flash , DDR3

Breakfast Bytes

Weekly News, October 9th, 2015

TSMC and Samsung Both in iPhone 6s It emerged that for the Apple iPhone 6s and…

• 2 min read
Intel , 5nm test chip , Altera , imec , PMC-Sierra , iPhone 6s

Breakfast Bytes

Jasper: the Gold Standard for Formal Verification

It was the Jasper User Group JUG this week. I first went to JUG several years ago…

• 4 min read
Jasper User Group , JUG , Jasper , Paul's Posts , Formal verification
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