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Cadence Japan

【ホンダHGR＋ケイデンス前編】Physical AIの“Physical”とは何か─現実に勝てないAIは、動けない

※本記事は、Honda総合研究センター/HGRに掲載された記事を、同社の許諾を得て転載しています。 皆さん、こんにちは。HGRセンター長の小川厚（おがわ あつし…

Cadence Japan
• less than a min read
featured , japanese blog

Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
• 3 min read
news story , featured , infrastructure ai , data center , hpe

Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform
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Blog - Post List
Latest blogs

Breakfast Bytes

ENNS 2017: Deep Learning, the New Moore's Law

One of the hottest areas in systems right now is deep learning: neural networks,…

• 3 min read
CVPR , deep learning , enns 2017 , CNN

Whiteboard Wednesdays

Whiteboard Wednesdays - Evolution of Ethernet: The Early Days

In this week's Whiteboard Wednesdays video, the second in a three-part series, Scott…

• less than a min read
Verification IP , Whiteboard Wednesdays , Scott Jacobson , VIP , Ethernet

Analog/Custom Design

New Virtuoso ADE Suite Wins Product of the Year

Cadence today announced that its next-generation Virtuoso® Analog Design Environment…

• 1 min read
ade suite , electronic products , product of the year

Breakfast Bytes

Nibbles: Breakfast Bytes Predictions 2017

It's that time of year when pundits try and predict major changes that will happen…

• 3 min read
2016 predictions , 2017 predictions

Verification

Bare Metal Tests and Hardware-Software Co-Verification

One interesting question that arises from time to time is whether the Cadence® Perspec…

• 4 min read
hardware-software co-verification , uvm , pswg , Acceleration , Perspec , virtual platform , System Design and Verification , Emulation , System simulation and analysis , Accellera , FPGA prototypes , testbench , portable stimulus , silicon , bare metal , verification

Breakfast Bytes

RISC-V "The thing that you learn and the thing that you use are the same"

The Electronic System Design Alliance (fka EDAC) has been organizing evening meetings…

• 7 min read
risc-v , cadence , isa , Jim Hogan , instruction set architecture , sifive , esd alliance

Analog/Custom Design

Virtuoso Video Diary: Demystifying the Abstract

You heard it right! It’s Virtuoso Abstract Generator, the popular library modeling…

• 3 min read
AG , abstract , Virtuoso Video Diary , Custom IC Design , Virtuoso Layout Suite XL

Breakfast Bytes

Automotive at CES

Automotive was huge at CES. A lot of it went for the glamour without really having…

• 3 min read
Automotive , NVIDIA , Qualcomm

Whiteboard Wednesdays

Whiteboard Wednesdays - Interconnect Design Verification Challenges

In this week's Whiteboard Wednesdays video, Nimrod Reiss takes a closer look at the…

• less than a min read
Verification IP , Whiteboard Wednesdays , VIP , MIPI , MIPI protocols , Nimrod Reiss , verification

Breakfast Bytes

Security in 2016 and 2017

It's the start of the year, plus the Consumer Electronics Show is over. I've already…

• 3 min read
security , botnets , mirai , drones , Singapore

Analog/Custom Design

Virtuoso Video Diary: Using the Hierarchical Color Locking Check

As you incrementally build your design and decompose the layout geometry into masks…

• 2 min read
dbLock , Hierarchical Color Locking Conflicts , Multiple Patterning Technology , HCL , Coloring Engine , Virtuoso Video Diary , Hierarchical Color Locking Check , multi-patterning technology , Custom IC Design , MPT

Academic Network

Cadence Academic Network Events in Russia

Despite all of the recent political tensions, Russia remains an attractive market…

• 2 min read
MIET , Cadence Academic Network , MEPHI , RusNano , Russia

Breakfast Bytes

5G is Coming. Qualcomm Keynote at CES

Steve Mollenkopf, the CEO of Qualcomm, gave one of the keynotes at the Consumer Electronics…

• 4 min read
5G , Automotive , Consumer Electronics Show , CES , IoT , Qualcomm , mobile

Breakfast Bytes

Bluetooth 5, 4.2, Bluetooth Classic, and Bluetooth LE...Confused Yet?

What is Bluetooth 5? 4.2? Bluetooth Classic? Bluetooth Smart? Low Energy? The naming…

• 6 min read
BLE , bluetooth , bluetooth 4.2 , Bluetooth 5.0 , Breakfast Bytes

Breakfast Bytes

Security the Google Way

The latest RISC-V workshop was held at Google. In the middle of the day, there was…

• 3 min read
security , risc-v , nsa , google , bios lockdown , rowhammer , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview January 16th to 20th 2017

https://youtu.be/ympju1edOh8 Coming from my office at Cadence Monday: Review…

• less than a min read
security , Automotive , Consumer Electronics Show , CES , Qualcomm , ADAS , privacy , esd alliance

Breakfast Bytes

RISCy Business: Next Hogan Evening at ESD Alliance Is RISC-V

The ESD Alliance Emerging Companies have been organizing a series of evening events…

• 2 min read
risc-v , Cadence Academic Network , ESDA , risc-v foundation , Hogan , Jim Hogan , esd allliance , Breakfast Bytes , sifive

Breakfast Bytes

CES Highlights

Happy New Year, and the first week of January means it is the Consumer Electronics…

• 4 min read
Consumer Electronics Show , CES , autonomous , virtual reality , drone , ADAS , augmented reality , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Evolution of Ethernet: The World Before Ethernet

In this week's Whiteboard Wednesdays video, the first in a three-part series on Ethernet…

• less than a min read
Verification IP , VIP , Ethernet
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