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Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
Corporate 30 Jun 2026 • 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

  • All 6431
  • Corporate News 266
  • Life at Cadence 206
  • Academic Network 169
  • Analog/Custom Design 804
  • Artificial Intelligence 28
  • Cloud 23
  • Computational Fluid Dynamics 374
  • Data Center 60
  • Digital Design 464
  • Learning and Support 63
  • RF Engineering 116
  • SoC and IP 435
  • System, PCB, & Package Design  1017
  • Verification 1329
  • Cadence Japan 18
  • Physical Systems Simulation 24

  • CFD(数値流体力学) 45
  • 中文技术专区 9
  • カスタムIC/ミックスシグナル 199
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Breakfast Bytes

What's For Breakfast? Video Preview November 13th to 17th 2017

https://youtu.be/Ar6PcH48DNo Coming from David Intercontinental Tel Aviv (camera…

Paul McLellan 7 Nov 2017 • less than a min read
ARM Techcon , artificial intelligence , Jasper User Group , deep learning , CDNLive , JUG , Samsung , TSMC , intel custom foundry , caspa , cdnlive israel , ARM , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays - A Practical Approach to Failure Modes, Effects, and Diagnostic…

In this week's Whiteboard Wednesday, John MacLaren explains the steps required for…

References4U 7 Nov 2017 • less than a min read
Automotive , Whiteboard Wednesdays , DDR4 , DDR , DDR3

Breakfast Bytes

October Revolution

Today is the 100th Anniversary of the October Revolution in Russia. But wait, isn…

Paul McLellan 7 Nov 2017 • 8 min read
st petersburg , Sparc , Russia , moscow , center for sparc technology , leningrad

Digital Design

Functional Correctness—The Forgotten Benefit of HLS

I like to ask questions, because you learn a lot that way. In fact, I did a survey…

dpursley 6 Nov 2017 • 2 min read
High-Level Synthesis , Digital Implementation , HLS , verification

Breakfast Bytes

Tensilica Can Improve Your Image

Why is image processing so important? To a first order approximation, all data is…

Paul McLellan 6 Nov 2017 • 5 min read
Vision P5 , Vision P6 , vision c5 dsp , kirin 970 , image processing , Hisilicon , Huawei

Analog/Custom Design

Art of Analog Design Part 7: Mismatch Tuning

In days of future past, we looked at DC mismatch analysis and compared it to Monte…

Art3 3 Nov 2017 • 4 min read
mismatch tuning , Monte Carlo analysis , DC Mismatch

Breakfast Bytes

The Book That Changed Everything

Academics have had a big influence on semiconductor design and design automation…

Paul McLellan 3 Nov 2017 • 7 min read
introduction to vlsi systems , carver mead , lynn conway

Breakfast Bytes

CHIP: College Hire and Internship Program

For some time, Cadence had an informal internship program: if managers wanted to…

Paul McLellan 2 Nov 2017 • 4 min read
Interns , Cadence Academic Network , recruitment , graduates , hiring

Breakfast Bytes

What's For Breakfast? Video Preview November 6th to 10th 2017

https://youtu.be/P3O79m4r-PM < Coming from the Cadence building 10 lobby (camera…

Paul McLellan 1 Nov 2017 • less than a min read
security , ARM Techcon , Simon Segars , security manifesto , mobile , Russia , social engineering , ARM

Breakfast Bytes

Cadence Academic Network Is Ten Years Old

Yes, it's true, the Cadence Academic Network is having its tenth anniversary. The…

Paul McLellan 1 Nov 2017 • 5 min read
mannheim , Cadence Academic Network , asic competence center

Whiteboard Wednesdays

Whiteboard Wednesdays - Understanding ISO 26262 Implications for Automotive Design…

In this week's Whiteboard Wednesday, Anne Hughes explains the considerations for…

References4U 31 Oct 2017 • less than a min read
Whiteboard Wednesdays , functional safety , ASIL , ISO 26262 , automotive design

Breakfast Bytes

Rob Rutenbar Is Recipient of 2017 Kaufman Award

This year's recipient of the Kaufman Award is Rob Rutenbar. He has a big connection…

Paul McLellan 31 Oct 2017 • 8 min read
neolinear , Coursera , rob rutenbar , university of illinois , MOOC , Kaufman Award , cmu , kaufman award dinner , c2s2 , Voci Technologies , university of pittsburgh , analog design , Breakfast Bytes

Breakfast Bytes

October 2017 Breakfast Buffet

https://youtu.be/2HhOBOftlv4 Coming from the roof of Cadence building 10 (camera…

Paul McLellan 31 Oct 2017 • less than a min read
China , AMD , linley group , semi , cdnlive taiwan , armmobile , pss , microprocessor , portable stimulus

Analog/Custom Design

Simplifying the Memory Design Process

On today’s SOC designs, the memory control logics and memory arrays take up a lot…

Kim Khoury 30 Oct 2017 • 2 min read
Memory , custom/analog , Spectre , Custom IC Design , Custom IC

Verification

Cadence and Arm Announce Early Access to Xcelium Parallel Logic Simulators on Arm…

On October 24, Cadence and Arm announced early access to the Xcelium Parallel Logic…

XTeam 30 Oct 2017 • 1 min read
Multi-Core , xcelium , ARM , simulation , announcement

Breakfast Bytes

Andrew Kahng on the Last Semiconductor Scaling Levers

It's going to be academic week here on Breakfast Bytes. There is an anniversary coming…

Paul McLellan 30 Oct 2017 • 9 min read
scaling , EDA , cloud , andrew kahng , machine learning , moore's law , Breakfast Bytes

Breakfast Bytes

Decoding Formal Club: Arm and Arteris

At the latest meeting of the Decoding Formal Club, organized by Oski and sponsored…

Paul McLellan 27 Oct 2017 • 8 min read
Jasper User Group , JUG , oski decoding formal club , formal , Oski , Breakfast Bytes , Formal verification

System, PCB, & Package Design 

SI Methodology for Multi-Gigabit Serial Link Interfaces (2 of 8)

Let’s assume that we are working on a PCI Express Gen 4 serial link, running at 16Gbps…

Sigrity 26 Oct 2017 • 3 min read
Serial link analysis , Signal Integrity , Sigrity

Breakfast Bytes

What's For Breakfast? Video Preview October 30th to November 3rd 2017

https://youtu.be/JQVYmENG0gw Coming from the Cadence booth at Arm TechCon …

Paul McLellan 26 Oct 2017 • less than a min read
ARM Techcon , Rutenbar , Cadence Academic Network , scaling , introduction to vlsi systems , intern , mead and conway , kahng , Kaufman Award , esd alliance
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