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Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
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Latest blogs

System, PCB, & Package Design 

Customer Support Recommended—Design and Simulation of Full Bridge DC-DC SMPS Using…

Switched Mode Power Supplies (SMPS) are used extensively in most of the power conversion…

• 4 min read
customer support , AMS simulator , PSPICE , Customer Support Recommended , PCB design , AMS simulation , SPB16.5 , Allegro

Whiteboard Wednesdays

Whiteboard Wednesdays - LPDDR4 IP Verification Challenges

In this week's Whiteboard Wednesdays video, YJ Patil discusses the challenges of…

• less than a min read
memory protocols , IP , Mobile SoCs , LPDDR4 , LPDDR4 IP , verifying IP

SoC and IP

Call for Papers for MemCon Now Open

What’s the biggest conference for everything related to memories? If you answered…

• 1 min read
Verification IP , DDR4 , MemCon , LPDDR , VIP , memory IP , Denali , Design IP and Verification IP , memories

SoC and IP

Mobile World Congress: Enabling Systems with Sensor Fusion, DSPs

BARCELONA, Spain—We hear a lot about sensor fusion and the applications that it can…

• 1 min read
DSP , sensor fusion , #MWC15 , cadence , Freespace , Mobile World Congress , Tensilica , Hillcrest Labs

Digital Design

High-Level Synthesis: Why Now?

March 27, 2015 – With a title like “Why Now?”, you might expect this to be a sales…

• 2 min read
High-Level Synthesis , EDA , Forte , Stratus , HLS

Whiteboard Wednesdays

Whiteboard Wednesdays—The Power of WiGig (802.11ad)

In this week's Whiteboard Wednesdays video, Bob Salem explains WiGig (IEEE 802.11ad…

• less than a min read
wireless , Whiteboard Wednesdays , interfaces , 802.11ad , wiGig

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Highlight Nets Associated with Component? It…

With the 16.6 Allegro PCB Editor release, a simplified method to highlight or de…

• less than a min read
PCB Layout and routing , Allegro GUI , Allegro 16.6 , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor

SoC and IP

Link Training: Establishing Link Communication Between DisplayPort Source and Sink…

Link training is the first stepping stone to enabling the communication channel between…

• 2 min read
Verification IP , VIP , DisplayPort , Link Training , Design IP and Verification IP

SoC and IP

ARM-Cadence IP Deal Propels Engineering Innovation Ahead: Martin Lund

On March 18, Cadence and ARM announced a groundbreaking deal that provides reciprocal…

• 6 min read
IP , electronic system design , cadence , systems engineering , IP design , ip cores , interoperability , ARM

Whiteboard Wednesdays

Whiteboard Wednesdays—Cognitive Layering Technique for Low-Energy, Sensor-Rich D…

In this week's Whiteboard Wednesdays video, Chris Rowen talks about techniques for…

• less than a min read
Whiteboard Wednesdays , IP , IoT , sensors , Tensilica , always-on , power

SoC and IP

Mobile World Congress: Two New Audio IP Announcements

BARCELONA, Spain—Mobile World Congress is not surprisingly focused on mobile devices…

• less than a min read
DTS , #MWC15 , cadence , audio , audio subsystems , Mobile World Congress , IP design , Tensilica , HiFi Audio , MaxxVoice

Whiteboard Wednesdays

Whiteboard Wednesdays—Major Enhancements of the PCIe Gen 4 Specification

In this week's Whiteboard Wednesdays video, Sandeep Brahmadathan talks about the…

• less than a min read
Whiteboard Wednesdays , IP , PCIe Gen4 , bandwidth , PCI Express , power

Life at Cadence

A Great Place to Do Great Work: Celebrating Our First Year on the FORTUNE List of…

Innovation starts with our people. For over 25 years, Cadence has been a leader…

• 4 min read
cadence , Fortune , GPTW , Lip-Bu Tan , Fortune 100 best companies to work for , great place to work

SoC and IP

IP Requirements for Verifying CHI-Based Designs

Just as IP components offload design effort, verification IP (VIP) components offload…

• 2 min read
Verification IP , Interconnect Validator , IVD , CHI , VIP , Design IP and Verification IP , CHI VIP

SoC and IP

Mobile World Congress: A Decade of Change in IP Innovation

BARCELONA, Spain—In the past decade, immense change has come to mobile electronic…

• 1 min read
electronic system design , #MWC15 , cadence , Steve Roddy , Mobile World Congress , Tensilica , mobile , IC design

Analog/Custom Design

Virtuosity: 12 Things I Learned In February by Browsing Cadence Online Support

Application Notes 1. Voltus-Fi Power Analysis Support and Power Grid View Generation…

• 3 min read
AMS Designer , PSPICE , Voltus , Layout , Constraints , FinFET , VLS XL

SoC and IP

WiGig Has Arrived to Enable IoT Designs--and Cut the HDMI Cord!

What is WiGig WiGig is the name given to a high-speed multi-gigabit wireless communications…

• 3 min read
wireless , cadence , IP blocks , IP design , WiGig IP , 802.11ad , wiGig , HDMI , WiFi

Whiteboard Wednesdays

Whiteboard Wednesdays - Optimizing Power Via a Configurable Processor

In this week’s Whiteboard Wednesdays, Chris Rowen takes a look at the basic energy…

• less than a min read
Whiteboard Wednesdays , IP , Chris Rowen , optimize power , Tensilica , energy , configurable processor , power

Analog/Custom Design

Virtuosity: 13 Things I Learned in January 2015 by Browsing Cadence Online Suppo…

'Tis the end of an era, folks. It should not be a surprise, but IC 5.1.41 reached…

• 2 min read
EAD , ADC , PLL , ADE , Spectre , Parasitic analysis
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