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Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
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Blog - Post List
Latest blogs

Digital Design

Voltus Voice: Breaking Ground with Voltus InsightAI—Swift Implementation via RAK

The blog discusses Voltus InsightAI RAK that is designed to give you an accelerated…

• 3 min read
artificial intelligence , Silicon Signoff and Verification , Voltus IC Power Integrity Solution , Innovus Implementation System , Generative AI , Power Integrity , Voltus InsightAI , Rapid Adoption Kits

Verification

Unraveling the PCIe ECN Unordered IO (UIO) Feature

Introduction Unordered IO (UIO) ECN is included in the PCIe 6.1 specification and…

• 3 min read
Verification IP , Functional Verification , PCIe 6.0 , PCI Express , verification

Digital Design

Socionext Accelerates SoC Design Breakthroughs with Cadence Signoff Tools

Socionext, a leader in SoC design, recently made significant strides in enhancing…

• 1 min read
digital design , Tempus , designed with cadence , certus , Quantus , silicon signoff

Data Center

Data Center Software: Flow Network Functionality

Flow network simulation is used to create simplified network models of piping/duct…

• 3 min read
data center , digital twin , Liquid Cooling

Corporate News

Cadence Partners with GSME to Further Semiconductor Industry Growth in Oman and the…

The global semiconductor supply chain is undergoing a profound transformation driven…

• 2 min read
EDA tools , cloud , semiconductors

Corporate News

Ampere Is Creating Cloud Native Processors

The current cloud computing market is large and growing rapidly. With the legacy…

• 1 min read
IP , Tempus , Palladium , cloud , designed with cadence , Joules , Genus Synthesis Solution , Innovus Implementation

Verification

Unveiling NOP Insertion Hint: A Performance Optimizer in CXL 3.0

Compute Express Link (CXL) is a high-speed interconnect standard that facilitates…

• 3 min read
256BLOptMode , CXL3.0 , Latency Optimization , NOP Insertion Hint , latency

Verification

Tools of the Future: How Cadence Is Using AI to Change Verification

Generative AI is sweeping through every industry, re-writing the way things are done…

• 3 min read
autotriage , Functional Verification , verisium , pindown , codeminer , AI , waveminer

Life at Cadence

Celebrating Pride Month at Cadence: A Global Commitment to DEI

June is a time of celebration, reflection, and advocacy for the LGBTQ+ community…

• 2 min read
inclusion , featured , Pride , DEI , LGTBQ+ , diversity , life at cadence , equity

Analog/Custom Design

Doc Assistant A-Z: Making the Most of the Cadence Cloud-Based Help Viewer: Pt. 2

At a bustling Cadence event, we met Adrian, an intern at a startup who immerses himself…

• 3 min read
In-Tool Help , user documentation , in-built help , Cloud-Based Help , Doc Assistant

Corporate News

The Rise of Cloud Computing in the Olympics

In an era where data reigns supreme, cloud computing has become a cornerstone in…

• 4 min read
cloud , sports , Olympics , 2024 Paris Olympics , technology , cloud computing

Computational Fluid Dynamics

LES Workflow with Turnaround Time of Less Than 10 Hours

This surge in the use of LES Solvers is primarily due to the inherent trade-offs…

• 4 min read
Fidelity Stitch , GPU-resident , Computational Fluid Dynamics , simulation software , Fidelity Pointwise , Fidelity LES Solver

Verification

Navigating the Future of EDA: The Transformative Impact of AI and ML

The landscape of electronic design automation (EDA) is undergoing a monumental transformation…

• 3 min read
artificial intelligence , ml , EDA , AI/ML , podcast , AI

SoC and IP

Navigating Chiplet-Based Automotive Electronics Design with Advanced Tools and F…

In the rapidly evolving landscape of automotive electronics, traditional monolithic…

• 6 min read
Automotive , electronics , chiplets , tools and flows

Verification

Unraveling the Newly Introduced Segmentation in PCIe 6.0

Overview The PCIe protocol evolved to its sixth generation in 2021, doubling its…

• 4 min read
verification strategy , Functional Verification , System Design and Verification , VIP , SoC , PCIe

カスタムIC／ミックスシグナル

Start Your Engines: ミックス・シグナルシミュレーションの効率を最適化する

Cadence Spectre AMS Designerは、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

• less than a min read
AMS , mixed-signal methodology , AMS Designer , Start Your Engines , AMSシミュレーション , ミックスシグナル手法 , AMS simulation , japanese blog

Digital Design

Training Insights – Why Is RTL Translated into Gate-Level Netlist?

Have you ever wondered how those tiny chips in your phone or computer actually work…

• 3 min read
Physical verification , conformal , Static timing analysis , DFT , EDI , Modus DFT , Tempus , Gate level simualtion , LEC , Signoff Analysis , DRC , STA , RTL-to-GDSII digital implementation digital design design verification Xcelium Verisium Genus Modus DFT Conformal Innovus Tempus Voltus Quantus , Floorplanning , RTL-to-GDSII , verisium , Xcelium Logic Simulator , Logic Design , Digital Implementation , Innovus , Timing analysis , Power Analysis , Synthesis , Placement , Quantus , Tempus Timing Signoff Solution , physical implementation , vManager , Modus ATPG , verification

Verification

Real Number Modeling Streamlines Mixed-Signal Verification

Semiconductor design is swiftly evolving, with mixed-signal design playing a pivotal…

• 4 min read
Functional Verification , Mixed Signal Verification , Xcelium Logic Simulator , Mixed-Signal , RNM , mixed signal , verification , EEnet

Corporate News

Switch – The AI, Cloud, and Enterprise Data Center Experts

Switch stands at the forefront as the premier data center designer, builder and operator…

• 1 min read
CFD , featured , switch , NVIDIA , digital twin , designed with cadence , Computational Fluid Dynamics , datacenter , Cadence Reality DC
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