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Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE/Marine for various…

• 3 min read

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE /Marine for various…

• 4 min read

Breakfast Bytes

Coventor Annual Panel: The Next Five Years

For the last few years at IEDM, Coventor have run an evening panel session looking…

• 8 min read
asml , KLA-Tencor , Lam Research , nova , Coventor , GlobalFoundries , IEDM

Verification

Type MIN / MAX Values in Specman

When defining coverage bins for coverage items, the number and size of bins depend…

• 3 min read
Specman , Specman coverage engine , Specman e

Verification

App Note Spotlight: SystemVerilog Gets a Real Number Modeling Update (SVRNM)

Thanks to Xcelium, there’s a new feature on the block in SystemVerilog. It pertains…

• 1 min read
SystemVerilog , real number modeling , Functional Verification , App Note Spotlight

Verification

CCIX Coherency: Verification Challenges and Approaches

Cache coherency is not a new concept. Coherent architectures have existed for many…

• 2 min read
Verification IP , ccix , SoC , coherency , System Verification

Breakfast Bytes

Passwords: Just Add Salt

This is a second post about passwords, picking up where Passwords: How Even Your…

• 5 min read
security , password , two-factor authentication , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview January 29th to February 2nd 2018

https://youtu.be/OtFTlu1u9xI Coming from TSMC North America (camera Sean) Monday…

• less than a min read
DesignCon , Models , TSMC , semiconductor IP , open source

Breakfast Bytes

Passwords: How Even Your Bank Doesn't Know Your PIN

In my predictions for 2018 piece yesterday, Nibbles: Breakfast Bytes Predictions…

• 7 min read
cryptographic hash , passwords , salt , hashing

Breakfast Bytes

Nibbles: Breakfast Bytes Predictions for 2018

Every year Breakfast Bytes makes some predictions for the year. At the end of the…

• 7 min read
security , Automotive , 5nm , autonomous vehicles , EUV

Analog/Custom Design

Virtuosity:Expression Builder - Now Plots ALL!

The Expression Builder has simplified writing complex expressions and has the ability…

• 2 min read
ADE Explorer , ADE , Expression Builder , Virtuoso , ViVA , Virtuosity , ADE Assembler

Breakfast Bytes

Running a Salesforce

I decided to run some posts on different areas of companies, and what I have found…

• 10 min read
sales , salesforce , business development , sales management

System, PCB, & Package Design 

Designing Data Bus with DDR5 Technology Today? Yes, It Is Possible!

Many system designers have been working with DDR4 RAM components in the past couple…

• 4 min read
ddr5 , AMI , Memory interface , IBIS , IBIS-AMI , DDR , Sigrity

System, PCB, & Package Design 

Improve High-Speed Serial Link Design with IBIS-AMI Backchannel Simulation

As signal integrity engineers, we know adaptive equalization is used in today’s multi…

• 3 min read
Serial link analysis , Backchannel Simulation , IBIS-AMI , SerDes , Sigrity , SystemSI

Verification

Cadence Collaborates with Test & Verification Solutions on Portable Stimulus

The Cadence® Connections® Verification Program brings together a worldwide network…

• 2 min read
CDNLive , Test , DVcon , pss , verification

System, PCB, & Package Design 

Dude, Where Are Your Files?

Let me tell you a funny story. We’ve been working with an outside research agency…

• 2 min read
Engineering Data Management , data management , Work in Process Data , Work in Progress Data , ECAD data , EDM , PCB design

Breakfast Bytes

Why You Shouldn't Trust Ken Thompson

I wrote yesterday about the two exploits, Spectre and Meltdown . I think that the…

• 7 min read
security , unix , thompson

The India Circuit

A Hackathon to Remember

A few weeks ago I wrote a blog about face recognition . Coincidentally, face recognition…

• 2 min read
Vishwakarma Institute of Technology , VLSI & Embedded Systems Design Conference , Tensilica , Tensilica Xtensa

Breakfast Bytes

Spectre and Meltdown: An Update

I wrote an extra Breakfast Bytes post a couple of weeks ago about Spectre and Meltdown…

• 10 min read
security , Intel , meltdown , AMD , x86 , Spectre , ARM
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