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Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
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Blog - Post List
Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - Verification Challenges for SoCs Integrating PCI Express…

In this week's Whiteboard Wednesdays video, Nick Heaton, Distinguished Engineer,…

• less than a min read
Whiteboard Wednesdays , SoC , PCI Express , verification

Analog/Custom Design

Virtuosity and Virtuoso Video Diary: Onwards and Upwards

Looking back at 2017, I note with satisfaction that it was a phenomenal year of blogging…

• 3 min read
Cadence blogs , custom/analog , Virtuoso , RF design , Virtuosity , Virtuoso Video Diary , Custom IC Design , Custom IC

Breakfast Bytes

IEDM Short Course: After 5nm

The Sunday of IEDM is always two full-day short courses. One is on the future of…

• 7 min read
feol , 5nm , beol , IEDM , DTCO

Verification

This Was 2017, Looking Forward 2018

With 2017 just out of the door, this is a good time to stop for a few minutes, look…

• less than a min read
Specman , Functional Verification

Breakfast Bytes

Mobile World Congress in One Keynote

It was CES last week. Generally, this is not an event about mobile, mainly because…

• 8 min read
5G , baidu , CES2018 , Verizon , Qualcomm , mobile

Breakfast Bytes

CES Keynotes: Cars, Flying Cars, Dancers, Music, Lights...and Sustainability

As I said yesterday , it was the Consumer Electronics Show this week. I attended…

• 10 min read
quantum computing , Automotive , Intel , CES , Ford

Verification

CRAFTing Your Aero/Defense UVM Testbench the Easy Way

So you want to build an automated testbench for your aero/defense project, eh? Luckily…

• 2 min read
Functional Verification , VWB , online tool , automated testbench , craft

Breakfast Bytes

CES Review: Rain...and Some Consumer Electronics

I have been at the Consumer Electronics Show (CES) all week. For 116 days through…

• 7 min read
Automotive , Consumer Electronics , CES , CES2018 , virtual reality , augmented reality

System, PCB, & Package Design 

SI Methodology for Multi-Gigabit Serial Link Interfaces (5 of 8)

Efficient Interconnect Extraction Once physical layout is complete, (or at least…

• 3 min read
Serial link analysis , SI , Multi-Gigabit , Interconnect Extraction , IBIS-AMI , Signal Integrity , SerDes , Sigrity

Breakfast Bytes

What's For Breakfast? Video Preview January 15th to 19th 2018

https://youtu.be/MPkAPCQyFvY Coming from Consumer Electronics Show, Las Vegas…

• less than a min read
5G , meltdown , ken thompson , JUG , CES2018 , Spectre , 5nm , what's for breakfast? , JasperGold

Verification

User Extensions to DUT Error

A question was raised to stackoverflow about how can one extend the dut _error()…

• 2 min read
Specman , e code , advanced verification , e language

Verification

App Note Spotlight - Introduction to Connect Modules

Welcome to the App Note Spotlight—a bi-weekly series where the XTeam highlights an…

• 3 min read
app note , Functional Verification , App Note Spotlight , Connect Module , mixed signal

Breakfast Bytes

Post-Silicon Compute

At the SEMI Strategic Materials Conference (SMC) a few weeks ago, Lucian Shifren…

• 6 min read
moore's law , ARM , power , DTCO

The India Circuit

Exciting Trends in 2018: An Interview with Jaswinder Ahuja

Jaswinder Ahuja is well-known to everyone in the semiconductor and electronics industry…

• 5 min read
mahindra & mahindra , Electronic System Design and Manufacturing , startups , Tata Motors , Maruti , electric vehicle , 2018 , ESDM

Whiteboard Wednesdays

Whiteboard Wednesdays - What to expect from TLM 2.0 Models for Memory Subsystems…

In this week's Whiteboard Wednesday, Vivek Nandakumar continues his explanation of…

• less than a min read
Whiteboard Wednesdays , Memory , TLM 2.0

Breakfast Bytes

Virtuoso System Design Platform Is Product of the Year

The title of this post says it all, but I'd better add a bit of color. Cadence was…

• 5 min read
virtuoso system design platform , Virtuoso , Allegro

Breakfast Bytes

2017: A Year in Breakfasts

So 2017 is over. Taylor Swift got into trouble for saying it was a great year and…

• 6 min read
security , Automotive , risc-v , nanosheet , broadcom , Qualcomm , 5nm , nanowire

Verification

Portable Stimulus User Gives Perspec PSS Technology Nearly Perfect Review

It’s always good to hear what real users think of products. Here is a very detailed…

• 3 min read

Verification

Register for the UVM Register Layer Webinar on January 12!

On Friday, January 12, Doulos is hosting a UVM Register Layer webinar, with the aim…

• less than a min read
webinar , Doulos , xcelium , uvm register layer
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