Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
• 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai

Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
• 3 min read
news story , featured , infrastructure ai , data center , hpe

Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Analog/Custom Design

So, where is that mixed-signal behavioral model I ordered?

It has been said many time that SPICE, the analog engineers tool of choice, is virtually…

• 2 min read
Chip-level simulation , Electrical validation , Test , Block-level simulation , Virtuoso , AMS simulation , Circuit Design , Modeling , Custom IC Design

Verification

Report on the first OVM World Summit at DAC

At the recent Design Automation Conference (DAC) in Anaheim, Calif., Cadence did…

• 1 min read
DAC , Verification methodology , Functional Verification , OVM

System, PCB, & Package Design 

PakSi-E "ocho" fuels Cadence Package SI solutions

In case you haven't heard, Allegro Package SI and Cadence SiP SI solutions now work…

• less than a min read
Digital SiP design , IC Packaging & SiP design , SI analysis and modeling

System, PCB, & Package Design 

Xrosstalk talks AMI

There's a great issue of Xrosstalk magazine out there that talks about algorthmic…

• less than a min read
PCB Signal and power integrity , SerDes , PCB design

RF Engineering

Senrinotabi

Greetings! My name is Art Schaldenbrand and I have been at Cadence for 12 years supporting…

• less than a min read
RF design

System, PCB, & Package Design 

How many DEHDL (Concept) designers customize their DEHDL environment?

I'm curious with the availablity within DEHDL (ConceptHDL) of customizing the menus…

• less than a min read
DEHDL , Library and design data management , Front-end PCB design , ConceptHDL

Verification

'Verification Acceleration' vs. 'Simulation Acceleration'

Simulation acceleration and emulation technology has been commonly used to run faster…

Anonymous • 1 min read
Acceleration , System Design and Verification , Emulation , Verification Acceleration , Simulation acceleration

System, PCB, & Package Design 

Which SPB customers will be attending CDNLive! 2008 in San Jose?

While I've attended a few Cadence Corporate User Group events over the past years…

• 1 min read
SPB , Design Entry HDL , Front-end PCB design , PCB design

System, PCB, & Package Design 

Lack of design-chain collaboration prevents SiP to go mainstream

A few years back, I was considering that the lack of an integrated design solution…

• 1 min read
backend implementation , IDMs , IC Packaging & SiP design , PDK , design chain

RF Engineering

Cadence, the new kid on the Electromagnetic Solver Block

On June 16 2008, Cadence introduced a new Electromagnetic (EM) solver technology…

• less than a min read
RF designer , Electromagnetic (EM) , RF design , wireless integrated circuit verification

Verification

ESL handoff: closer than you think

Take a look at the article linked below, titled: "ESL handoff: closer than you think…

• less than a min read
System Design and Verification , ESL handoff

Verification

Dreaming in Code

One of the best books I read this year is called Dreaming in Code by Scott Rosenberg…

• 2 min read
Dreaming in Code , System Design and Verification , Chandler project

Verification

Do you want to buy my chip?

Once upon a time semiconductor companies produced a chip, made a data sheet, showed…

• 1 min read
System Design and Verification , Hardware/software co-verification
CDNS - Fix Layout Hompage