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Featured

Accelerating Chiplet Innovation with a New Partner Ecosystem

The semiconductor industry is currently undergoing a massive shift. As we push the…

Mick Posner
Mick Posner 4 Mar 2026 • 4 min read
IP , featured , chiplets , physical ai , OCP FCSA

The Memory Imperative for Next-Generation AI Accelerator SoCs

The tremendous growth in large language model (LLM) size corresponds with an equally…

Subash Peddu
Subash Peddu 17 Feb 2026 • 4 min read
featured , HBM , SoC , AI

Scale-Up and Scale-Out IP for Optical Interconnect for Accelerated Computing

Optical connectivity is foundational to modern data centers, enabling high-bandwidth…

HW202512191014
HW202512191014 6 Feb 2026 • 4 min read
featured , AI data center , AI factory , Data Center architecture
SoC and IP
Latest blogs

Enkl Sound Elevates Audio Tech with Tensilica HiFi DSP for Unmatched Excellence

In the rapidly evolving world of audio technology, Enkl Sound Copenhagen emerges…

Vinod Khera 16 Dec 2024 • 3 min read
Sound , Hearable , wearables , Tensilica HiFi DSP , Bluetooth Speakers

Accelerate the Photonic IC Design with Cadence EPDA Environment

Do you believe the existing semiconductor methodologies will adequately support the…

Vinod Khera 10 Dec 2024 • 4 min read
Photonic IC Design , EPDA Environment , photonics

Accelerate Your Automotive, Consumer, and Data Center Semiconductor Projects

Semiconductor innovation is the driving force behind groundbreaking advancements…

Corporate 10 Dec 2024 • 3 min read
Automotive , featured , CES , Tensilica

Cadence Transforms Chiplet Technology with First Arm-Based System Chiplet

Cadence has achieved a significant milestone by designing and taping out its first…

Moshiko Emmer 19 Nov 2024 • 4 min read
Automotive , ucie , featured , chiplets , NoC , lpddr5 , ARM

Simulating Multiple Cadence DSPs as Multiple x86 Processes

An increasing number of embedded designs are multi-core systems. At the pre-silicon…

Nayan Gaywala 31 Oct 2024 • 4 min read
Tensilica , Xtensa , SystemC , multicore , simulation , multiprocessing

Redefining Hearing Aids with Cadence DSPs

Hearing is one of the most essential senses for engaging with the world. It enables…

Vinod Khera 29 Oct 2024 • 4 min read
Tensilica DSPs , HiFi DSP , Fusion DSP Family , Hearing Aids

Driving Innovation: Cadence's Cutting-Edge IP on TSMC's N3 Node

Staying ahead of the curve is essential to meeting customer needs. Cadence has consistently…

Frank Ferro 14 Oct 2024 • 2 min read
ucie , Memory , LPDDR , ip cores , PCIe , DDR , GDDR7

The Future of Driving: How Advanced DSP is Shaping Car Infotainment Systems

As vehicles transition into interconnected ecosystems, artificial intelligence and…

Reela Samuel 8 Oct 2024 • 5 min read
Automotive , DSP , infotainment , Tensilica , HiFi 5s

Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem

Cadence tapes out 32G UCIe interface IP for high speed, highly efficient chiplet…

MBhatnagar 7 Oct 2024 • 4 min read
ucie , IP , die-to-die

Locking When Emulating Xtensa LX Multi-Core on a Xilinx FPGA

Today's high-performance computing systems often require the designer to instantiate…

Nayan Gaywala 30 Sep 2024 • 4 min read
AXI , Tensilica , Xtensa , FPGA

DDR5 12.8Gbps MRDIMM IP: Powering the Future of AI, HPC, and Data Centers

The demand for higher-performance computing is greater than ever. Cutting-edge applications…

Kos Gitchev 25 Aug 2024 • 2 min read
ddr5 , Design IP , IP , gddr6 , PHY , 3nm , MRDIMM , GDDR , memory IP , Denali , Design IP and Verification IP , DDR

GDDR7: The Ideal Memory Solution in AI Inference

The generative AI market is experiencing rapid growth, driven by the increasing parameter…

Frank Ferro 20 Aug 2024 • 3 min read
featured , gddr6 , inference , HBM , training , AI , GDDR7

HBM3E: All About Bandwidth

The rapid rise in size and sophistication of AI/ML training models requires increasingly…

Frank Ferro 6 Aug 2024 • 2 min read
featured , HBM , hbm4 , SerDes

How Cadence Is Revolutionizing Automotive Sensor Fusion

The automotive industry is currently on the cusp of a radical evolution, steering…

Vinod Khera 6 Aug 2024 • 5 min read
Automotive , Sensor Processing , sensor fusion , Automotive SoC , automotive IP , NPU , AI

Are You SAFE Yet? Leveraging the Ecosystem to Boost Your Product Time to Market

We live in a rapidly growing “digitalized world,” with an ever-increasing need for…

William Chen 8 Jul 2024 • 2 min read
IP , featured , Silicon Solution Group , PCIe 5.0 , samsung foundry , PCIe , SSG , PCIe 6.0 , safe , PCI Express , Protocol IP

Navigating Chiplet-Based Automotive Electronics Design with Advanced Tools and F…

In the rapidly evolving landscape of automotive electronics, traditional monolithic…

Reela Samuel 25 Jun 2024 • 6 min read
Automotive , electronics , chiplets , tools and flows

Cadence Showcases World's First 128GT/s PCIe 7.0 IP Over Optics

PCI-SIG DevCon 2024 was a great success for Cadence. We posted the blog, Cadence…

GautamS 14 Jun 2024 • 2 min read
Design IP , IP , featured , PHY , 128 GT/s , PCIe 7.0 , PCIe , Optics , SerDes , SerDes IP

How Cadence Is Expanding Innovation for 3D-IC Design

The market is trending towards integrating and stacking multiple chiplets into a…

Vinod Khera 11 Jun 2024 • 5 min read

Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24

PCI-SIG DevCon 2024 – 32 nd Anniversary For more than a decade, Cadence has been…

GautamS 11 Jun 2024 • 6 min read
Design IP , IP , PHY , PCIe 7.0 , PCIe , semiconductor IP , SerDes , PCI Express , PCI-SIG

Chiplet Integration in the Automotive Realm

As technology continues to advance, the automotive industry is rapidly transforming…

Reela Samuel 5 Jun 2024 • 4 min read
Automotive , ucie , chiplets , 3D-IC , design flow , d2d , verification

Cadence San Jose Hosts JEDEC LPDDR (Low-Power DDR) Task Group Meeting

Low-power DDR (LPDDR ) SDRAM has been one of the most widely used memories in the…

Shyam Sharma 28 May 2024 • 1 min read
Verification IP , ddr5 , IP , JEDEC , HBM , GDDR , memory IP , DRAM , lpddr5 , lpddr5x , memory models

UCIe and Automotive Electronics: Pioneering the Chiplet Revolution

The automotive industry stands at the brink of a profound transformation fueled by…

Vinod Khera 29 Apr 2024 • 5 min read
ucie , IP , ip cores , Tensilica

Celebrating World Intellectual Property Day

LEGO ® is the world’s most famous toy brand. The experience of playing with these…

Arif Khan 26 Apr 2024 • 1 min read
Design IP , IP

Intel and Cadence Partner to Build Out the Foundry Ecosystem in America

As a result of the largest public-private investment ever made in the U.S. semiconductor…

GautamS 28 Mar 2024 • 3 min read
CXL , IP , featured , PCIe 5.0 , PCIe , CHIPS and Science Act , Silicon Solutions Group , Intel Foundry

Revolution on the Road: How Cadence is Driving the Future of Automotive Design!

The automotive industry is at a crucial inflection point, pivoting from traditional…

Vinod Khera 5 Mar 2024 • 8 min read
functional safety , Automotive Solutions , infotainment , autonomous driving , Automotive Ethernet , automotive IP , ADAS

Cadence Sets the Gold Standard for UCIe Connectivity at Chiplet Summit '24

Cadence Demonstrated first silicon in UCIe during Chiplet Summit 2024. The demo showed…

MBhatnagar 28 Feb 2024 • 3 min read
ucie , UltraLink , IP , die-to-die , d2d

UCIe Interoperability Between Intel and Cadence

Intel and Cadence are collaborating on an initiative to demonstrate interoperability…

SFUNG 7 Nov 2023 • 3 min read
ucie , chiplets , IP integration , semiconductor IP , Design IP and Verification IP

Cadence is a Contributing UCIe Consortium Member

This blog was originally posted on uciexpress.org . The Cadence member spotlight…

SFUNG 2 Nov 2023 • 5 min read
ucie , chiplets , Design IP and Verification IP
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