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System, PCB, & Package Design : IC Packagers: Optimize Display Settings for Faster Screen Redraws

Tyler

While designing interposers and very high pin count device packages, as the number of objects to manipulate increases, you may notice that the display takes longer to draw. This is for a very good reason: by default, the tools will draw everything.....
- 15 Oct 2019
Breakfast Bytes: Machine Learning in JasperGold

Paul McLellan

When I was in Tel Aviv for CDNLive Israel, I sat down with Ziyad Hanna to discuss what Cadence calls "Smart Formal Technologies". This is using deep learning techniques to improve formal verification with the JasperGold Formal Verification ...
- 15 Oct 2019
System, PCB, & Package Design : DATA Pulse: Collaborate and Combine Forces – Allegro EDM Team Design

Auromala

Working in an ECAD design team? Want to control access to certain design elements? Would notifications of design changes by other team members be helpful? If yes…
- 14 Oct 2019
Breakfast Bytes: Arm TechCon: The Keynotes

Paul McLellan

Simon Segars opened Arm TechCon with a new look, having discovered that real men have beards. This is the 15th Arm TechCon. In this post I'm going to focus on the new things that Arm announced during the keynotes. Simon Segars Back when TechCon s...
- 14 Oct 2019
定制IC芯片设计 : Virtuosity：Modgen简介

Aneesh Shastry

半导体行业的飞速发展导致对模拟版图自动化的需求不断增长。模拟电路通常使用current mirrors和 differential pairs的结构，其中器件特性的分组和匹配至关重要。 Virtuoso通过提供高端工具来解决这些挑战，这些工具可确保在设计目标上更快地融合并实现高效的版图实现。在此博客中，我将向您概述这样一种工具-Virtuoso Module Generator，俗称Modgen。
- 13 Oct 2019
Breakfast Bytes: Sunday Brunch Video for 13th October 2019

Paul McLellan

https://youtu.be/8BM28qwHyUk Made at Arm TechCon (camera Randy Smith) Monday: What Is Quantum Supremacy? Tuesday: It's Ada Lovelace Day Today Wednesday: The First Woman to Receive the Kaufman Award Thursday: The Economist on RISC-V and ...
- 13 Oct 2019
PCB、IC封装：设计与仿真分析: 5G系统的PCB材料和设计要求

SDA China

即将到来的5G时代迫使设计师对于移动设备和物联网设备的PCB设计进行着重新思考。这些5G系统将使大多数消费者的设备运行速率达到新高度。当我们对电路板提出通信要求时，还需要考虑许多其他关键因素。 5G系统要求预计到2021年，将有30亿台移动设备和物联网设备上线。随着这些设备的上线，5G系统的目标是（相比4G）：数据速率提高10-20倍（高达1 Gbps）、流量增加1000倍和每平方公里的连接增加10倍。5G还计划将延迟降至1毫秒，比4G网络快10倍。相比4G和3G，5G无线网络的运行频率...
- 11 Oct 2019
Breakfast Bytes: Sensor Fusion and ADAS in TSMC Automotive Processes

Paul McLellan

At the recent TSMC OIP Symposium, Cadence's Tom Wong presented Sensor Fusion and ADAS SoC Designs in TSMC 16FFC and N7. These two processes are the "compact" 16nm process and the mainline 7nm process, two processes that TSMC selected for adding addit...
- 11 Oct 2019
Breakfast Bytes: The Economist on RISC-V and Indian Semiconductors

Paul McLellan

Our industry is difficult to understand. Most of us resort to imperfect analogies to explain it when we have to. Some of this is because we have a complex supply chain for creation. It is easy to get confused between an instruction set architecture (...
- 10 Oct 2019
Analog/Custom Design: Virtuosity: Device-Level Routing for Advanced Nodes—Tree Route Flow

Parula

This is the last blog in the Virtuoso Device-level routing blog series and completes a story of how a trunk and a twig became a tree. The blog describes about the ground breaking Tree route flow and its features.
- 9 Oct 2019
Breakfast Bytes: The First Woman to Receive the Kaufman Award

Paul McLellan

Mary Jane Irwin just got back from a cruise around the Greek islands with her husband of 53 years to celebrate being the first woman to receive the Kaufman award. Yesterday's post was It's Ada Lovelace Day Today, a celebration not just of Ada...
- 9 Oct 2019
定制IC芯片设计 : Virtuosity：Automated Device Placement and Routing — 基于 WSP 的树型设备布线

Sravasti

此博客概述了 Virtuoso Automated Device Placement and Routing解决方案的最后一步。在本博客中，我将介绍Automated Device Placement and Routing功能的主要优点。
- 9 Oct 2019
定制IC芯片设计 : Virtuosity：自动设备放置和布线*基础层填充插入

Sravasti

欢迎回到我在Virtuoso Automated Device Placement and Routing 系列的下一篇文章。在advanced nodes上，在运行放置器后，在布局路由并完成之前，需要处理一些基础图层的额外要求。在本博客文章中，我将讨论添加设备填充如何帮助满足这些要求。阅读帖子以了解更多。
- 9 Oct 2019
Whiteboard Wednesdays: Whiteboard Wednesdays - The Need for Electro-Thermal Co-simulation

References4U

In this week's Whiteboard Wednesdays video, Tom Hackett explains the need for electrical-thermal co-simulation based on finite element analysis (FEA) to support SoC designs utilizing advanced packaging methods such as 3D IC stacks. For a detailed explanation of the mathematics behind Finite Element Analysis, see this excellent video by Grasp Engineering: Practical Introduction and Basics of Finite Element Analysis
…
- 8 Oct 2019
Academic Network: 4th Tensilica Day(s!) in Hannover: Doubling the Days, Doubling the Fun

Aspa Karanasiou

The popularity of the Tensilica day events in previous years (last year's presentations, blog), led to increasing this year’s event from one day to two days of technical presentations and demos. As the tradition goes on, on 23rd and 24th of...
- 8 Oct 2019
System, PCB, & Package Design : IC Packagers: Undoing Your Custom SKILL Commands

Tyler

Today, we’ll talk about something simple but still important. For all of you who write your own SKILL code commands to help your teams be more productive, this one’s for you. Any time you are modifying the database, it is important that y...
- 8 Oct 2019
Academic Network: First Ever China Integrated Microsystem Simulation and Modeling Master Thesis Contest

Tracy Zhu

Cadence Academic Network was the exclusive sponsor of the first ever China Integrated Microsystem Simulation and Modeling Master Thesis Contest. The contest was hosted by the Integrated Microsystem Modeling and Simulation Committee, China Simulation ...
- 8 Oct 2019
Breakfast Bytes: It's Ada Lovelace Day Today

Paul McLellan

The second Tuesday in October is Ada Lovelace Day (ALD). This is not just a day to celebrate Ada herself, generally given the honor of being considered the first computer programmer, but it is an international day celebrating the achievements of...
- 8 Oct 2019
Analog/Custom Design: Virtuoso Meets Maxwell: Package PDK in Virtuoso! How Is it even possible!? (Part 1)

VRF Knight

You heard it right! Virtuoso now supports Package and Board level designs; therefore, it has capabilities to import/create Package PDKs and libraries in Virtuoso. I have been working at Cadence for the past five years, in four out of these five years I have been mainly focused on our Intelligent System Design Solutions for High-Speed and RF Designs, specifically on how to create and maintain Package PDKs in Virtuoso.…
- 7 Oct 2019
Breakfast Bytes: What Is Quantum Supremacy?

Paul McLellan

There are rumors that Google has achieved quantum supremacy. According to Scott Aaronson, my go-to person for all things quantum mechanics, we weren't meant to know about this yet. As Scott says on his blog: As the world now knows, Google is ind...
- 7 Oct 2019
Breakfast Bytes: Sunday Brunch Video for 6th October 2019

Paul McLellan

https://youtu.be/zEmNTM72GYE Made at Sawyer Camp Trail (camera Carey Guo) Monday: TSMC OIP: Process Status Tuesday: The 2019 Kaufman Award Goes to Mary Jane Irwin Wednesday: HOT CHIPS: The AWS Nitro Project Thursday: GLOBALFOUNDRIES Technology C...
- 6 Oct 2019
Academic Network: Student Story: Min-Chun's Contribution to Cell-Aware Test

Kira Jones

Let me introduce myself. My name is Min-Chun Hu, a master student majoring in electrical engineering (EE) at the National Tsing-Hua University (NTHU) in Hsinchu, Taiwan. Currently I am doing a nine-month internship at the world-renowned research inst...
- 4 Oct 2019
PCB、IC封装：设计与仿真分析: 关于PCB设计倒角需要了解的一切

TeamAllegro

将任意一个角落切掉，便能得到一个倒角。从儿童防护桌到泰姬陵的标志性外墙，人类通过倒角来解决与角相关的功能和美学问题由来已久。使两个表面以90°以外的角度，尤其是45°相交时，便产生了倒角；但倒角终止于平边，而不是一个点，这具有“倒圆”角的效果。以下是PCB设计中需要倒角的两个常见原因：第一个原因相对简单——正在构建的PCB拟采用边缘连接器（如PCI）。第二个原因稍微复杂——这有关一种通常广受吹捧...
- 4 Oct 2019
Breakfast Bytes: EDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report

Paul McLellan

Earlier this week I wrote a post covering the AWS presentation from HOT CHIPS about the Nitro project. Although the Nitro chips all contain Arm processors, that doesn't make them "Arm servers" in the sense that the processor running the application c...
- 4 Oct 2019
Analog/Custom Design: Virtuoso Video Diary: Multi-Technology Simulation—The Good has Changed for Better

Udit Rajput

This blog highlights the recent enhancements made to the Multi-Technology Simulation (MTS) feature.
- 3 Oct 2019

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