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Analog/Custom Design: Virtuoso Meets Maxwell: Virtuoso RF Solution—The Flow Revolution Enters the Next Level

Claudia Roesch

In many ways 2020 was an exceptional year with extraordinary challenges for all of us. Despite the unusual circumstances of a global pandemic, it was an exciting year with lot of product innovation that lies behind. To start with the Virtuoso Meets Maxwell series in 2021, let’s take a moment to look back at what we have achieved since the inception of the Virtuoso RF Solution.
- 24 Feb 2021
定制IC芯片设计 : Virtuoso Meets Maxwell: EM 全视图提取功能

jgrad

摘要：本博客介绍了Virtuoso RF 解决方案的全视图（full cellview）提取功能，允许用户提取一个完整布局视图的3D S参数模型用。欲知更多，请继续阅读
- 24 Feb 2021
Breakfast Bytes: The OpenAccess Story

Paul McLellan

When I worked for Cadence back in the early oughts, we developed a layout database called OpenAccess, usually abbreviated to OA. It had actually been designed from the ground up to be the native database that would underlay Cadence's physica...
- 24 Feb 2021
RF Engineering: μWaveRiders: Simulating Mixed-Signal RF Systems with AWR VSS Software

TeamAWR

This blog highlights the types of RF systems that AWR Visual System Simulator (VSS) communications and radar systems design software aids in analyzing. Future blogs in this series will include details on time-domain vs. frequency domain analysis, digital signal processing, and RF budget analysis capabilities within AWR VSS software.
- 24 Feb 2021
Life at Cadence: Black History Month 2021: Become the Change Agents Our World Needs

Johnas Street

While February is Black History Month, we should also take the other 11 months to focus on the future—one that is inclusive and promotes equity and equality. Unfortunately, the Black community is still working hard to remedy what happened in pa...
- 23 Feb 2021
The India Circuit: Mohammad Mujamil: A Story of Hard Work and Fortitude

Asim Khan

Subsequent to my previous blog about the Cadence Scholarship Program, I bring to you another inspiring story featuring one of our students - Mohammad Mujamil. Meet Mohammad Mujamil Growing up with poverty always at the door, struggling...
- 23 Feb 2021
Breakfast Bytes: The Death of Distance

Paul McLellan

You may have seen the news that if you read an interesting article in the Australian press, you cannot share it with your friends on Facebook. Say what? Cable TV Let's start with a bit of history. There is probably some similar story to this base...
- 23 Feb 2021
RF /マイクロ波設計: 新しいミリ波MIMOレーダーシステムの設計

RF Design Japan

レーダーは、反射した電波を使用して、物体の距離、角度、または速度を決定します。かつては航空宇宙および防衛産業の独占的な領域であったこれらの検出システムは、現在、消費者産業、特に自動車レーダーで人気を集めています[1]。部分的には、シリコンゲルマニウム（SiGe）やCMOS技術などの大量の半導体プロセスにより、大量の商用アプリケーション向けの費用効果の高いシステムが可能になっているため、商用採用が可能です。このブログでは、商用レーダーアプリケーション向けの60GHz周波数変調連続波（FMCW）...
- 22 Feb 2021
RF Engineering: Design of a Novel mmWave MIMO Radar System

TeamAWR

Radar uses reflected radio waves to determine the range, angle, or velocity of objects. These detection systems that were once the exclusive domain of the aerospace and defense industry are now gaining popularity in the consumer industry, most notably automotive radar. Commercial adoption is possible, in part, because of high-volume semiconductor processes such as silicon germanium (SiGe) and complementary metal-oxide…
- 22 Feb 2021
Breakfast Bytes: Arm/Cadence on Implementing Advanced Microprocessors in Advanced Processes

Paul McLellan

Late in January, Cadence and Arm ran a joint webinar on implementing advanced microprocessors in advanced processes using the digital full flow for implementation and signoff. The opening presentation was by Arm's Dermot O'Driscoll. Then Yufeng Luo p...
- 22 Feb 2021
Verification: Taking LPDDR5 to the Next Level

Shyam Sharma

To cater to ever-increasing bandwidth demands from low-power DRAMs especially for devices like cell phones, tablets and others with limited power budgets, JEDEC has extended the clock frequencies supported by its latest low power memory offering LPDDR5 to include the 937MHz and 1066MHz that translates to the max data rates of 7500MT/s and 8533 MT/s.

Devices supporting these incredibly high data rates are being categorized…
- 19 Feb 2021
Verification: DisplayPort 128b/132b Concurrent LTTPR Link Training

tfox

Before a video frame can be sent, the Source (DP-TX) must complete link training (LT) with the downstream devices. DisplayPort (DP) version 2.0 specification mandates support for a 128b/132b link layer and non-transparent Link Training-Tunable PHY Repeater (LTTPR) device when connected.

The diagram below shows the connection between the source, LTTPRs, and sink devices. The specification allows up to eight LTTPRs. The…
- 19 Feb 2021
Digital Design: Understanding Clock Gating Report and Cells

MJ Cad

Hi everyone, Are you interested in reducing the power dissipation of your design? Who wouldn’t? What about taking the advantage of Clock Gating? Clock Gating is a technique that enables inactive clocked elements to have gating logic automatical...
- 19 Feb 2021
System, PCB, & Package Design : Sigrity and Systems Analysis 2021.1 Release Now Available

SigrityReleaseTeam

The Sigrity and Systems Analysis 2021.1 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 2021.1 release, see the README.txt file in the installation hierarchy. SIGRITY/SYSANLS 2021.1 Here is a lis...
- 19 Feb 2021
カスタムIC／ミックスシグナル: Spectre Tech Tips: Spectre X RF解析の使用

Custom IC Japan

2020年9月末にSPECTRE 20.1ベース・リリースにてSpectre® X-RFがリリースされました。Spectre X-RFテクノロジはSpectreのRF解析にSpectre Xエンジンを統合します。このブログでは、Spectre X-RFテクノロジを紹介します。 Spectre X-RFの概要 Spectre X-RFは、複雑なFinFET (およびその他の) デバイス・モデルを使用した先端ノード・デザインや、多数のRCを含む大規模なポスト・レイアウト・デザインな...
- 18 Feb 2021
RF /マイクロ波設計: Cadence AWR Design EnvironmentのE-ニュースレター(2021年1月)

RF Design Japan

　日本語翻訳版をお届けします。ぜひ最新の製品に関する最新の情報をご確認ください。このニュースレターの英語版はこちらです。 Cadence AWR Design Environment E-ニュースレターの購読はこちらからご登録下さい。 All Things RF: January 2021 Cadence AWR ソフトウェアプラットフォームご登録下さい:Cadenceのシステム解析ニュースレター! 高密度のRF /ミックスドシグナル配線と部品を含む今日の無線...
- 18 Feb 2021
System, PCB, & Package Design : BoardSurfers: Training Insights: How to Assess Electrical Performance of Packages

Niharika1

In this blog, you will be taking an IC package design from Allegro® Package Designer Plus (APD Plus) and export the design to Sigrity XtractIM. You will use XtractIM to extract models from the exported package and to assess the electrical pe...
- 17 Feb 2021
Analog/Custom Design: Start Your Engines: Automatic Configuration Creation for a Mixed-Signal Test Bench

Andre Baguenie

In this post, I will cover how you can easily create an automatic configuration for a mixed-signal test bench.
- 16 Feb 2021
Verification: HyperRam as DRAM for Some Applications!!!

Chetans

Applications like Automotive, Industrial control panels, Smart Home, Smart watches, smart speakers and bends require Low cost, Low power consumption, High computing efficiency, Easy to control and Low form factor memory devices to process data temporarily to gain widespread adoption in the market place. HyperRam memory has all above characteristics to improve performance of end devices.

The HyperRam device is the high…
- 16 Feb 2021
Verification: Training Insights - Clean RTL Faster Without Simulation! Here’s How.

Nizar Hanna

RTL designers are challenged by increasingly complex designs. They’re also expected to deliver higher quality RTL to verification teams under tight schedules. And teams want to expose bugs as soon as possible—to reduce the cost per bug—which puts additional pressure on designers.

Conventional methods of design bring-up using unit-level testbenches are no longer the optimal way to address these challenges…
- 12 Feb 2021
Breakfast Bytes: Offtopic: All the Days

Paul McLellan

It's a weird confluence of days this weekend. It is the Chinese New Year on the 12th, today. It is Valentine's Day on the 14th. And it is Presidents' Day on the 15th. Cadence is off for that last one (in the US), and, as is traditional the day before...
- 12 Feb 2021
カスタムIC／ミックスシグナル: Virtuoso Video Diary: Split Symbolsとは

Custom IC Japan

何百ものピンを持つ大きな symbol は管理するのが難しく、デザインを乱雑にします。より複雑なデザインと高度なテクノロジーにおいてブロックを分割することは、どのようなデザインでも便利な機能になっています。 Split Symbols 機能は ICADVM 20.1 base リリースの Virtuoso Schematic Editor で導入され、大きな symbol を複数の部分的な symbol に分割することにより、簡単かつ効率的に管理するソリューションを提供します。&nbs...
- 11 Feb 2021
Analog/Custom Design: Virtuoso Video Diary: Performance Diagnostic Tool – An MRI Scanner for Virtuoso

Sucharita

You can now use the Performance Diagnostic tool in the Virtuoso custom IC design platform to diagnose issues that might be causing your system to slowdown or freeze. Click here to know more.
- 11 Feb 2021
Academic Network: BarCamp? 2021 DATE BarCamp!

Anton Klotz

The following text was written by Georg Gläser, one of the organizers of the edaBarCamp.de events, who also was co-organizer of the BarCamp @ DATE event. Thank you, Georg, for all your help and for this text. The BarCamp was an interactive open...
- 11 Feb 2021
Life at Cadence: An Amazing Season to Give

TramN

Giving has always been a special part of our culture at Cadence. It’s one of the reasons why I truly love working here. Our employees are so passionate about giving back to the communities where they live and work. Each year, Cadence employees ...
- 11 Feb 2021

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