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Latest Blog Posts

  • Breakfast Bytes: DATE: Making Fabs Smarter

    Paul McLellan
    Paul McLellan
    One of the keynotes at the recent DATE 2021 was local. Or would have been local if DATE had taken place in Grenoble as originally planned. Of course, DATE was virtual and you could watch from anywhere in the world. About the only thing truly European...
    • 11 Feb 2021
  • Breakfast Bytes: Kneron's Experience Reducing Edge AI Processor Development Schedules with Tensilica DSPs

    Paul McLellan
    Paul McLellan
    As late as 2010, the received wisdom among computer scientists was that neural networks would not amount to much. Those ideas had been tried repeatedly for decades and never produced practical results. Yes, our brains work that way, but it seemed tha...
    • 10 Feb 2021
  • System, PCB, & Package Design : IC Packagers: A New Way to Create Structures

    Tyler
    Tyler
    Let’s focus today on an established routing technology with a new twist! All of you are doubtless familiar with the concept of structures – formerly called via structures, renamed to structures because of their growing flexibility and application across many flows.
    • 9 Feb 2021
  • Digital Design: Voltus Voice: Power-Saving Chip Design Is Not a Choice; It’s a Necessity

    Ramesh Sharma
    Ramesh Sharma
    A blog on how the Voltus power-gating analysis solution enables engineers to address the low-power design challenge of extending battery life while reducing the leakage power.
    • 9 Feb 2021
  • System, PCB, & Package Design : BoardSurfers: How to Detect and Resolve Copper Void Slivers

    Boopathy J
    Boopathy J
    Markets today are being driven by miniaturization. As the size is decreasing, PCB designs are getting more and more complex. Manufacturing boards while also addressing the signal integrity issues is becoming a challenge. With continuous shrinkage in the pin ...
    • 9 Feb 2021
  • Breakfast Bytes: DATE: What Is Single Pilot Operation? Airbus Q&A

    Paul McLellan
    Paul McLellan
    Yesterday's post DATE: What Is Single Pilot Operation? Airbus Explains was the first of two about the Airbus keynote at DATE. After a pre-recorded presentation there was a live Q&A. The questions covered a lot of ground and I thought it ...
    • 9 Feb 2021
  • The India Circuit: Tanaya Bapat: A Story of Perseverance and Strength

    Asim Khan
    Asim Khan
    Subsequent to my previous blog about the Cadence Scholarship Program, I bring to you another inspiring story featuring one of our students - Tanaya Bapat. The Cadence Scholarship Program At Cadence, giving back to society is of the important asp...
    • 8 Feb 2021
  • Breakfast Bytes: DATE: What Is Single Pilot Operation? Airbus Explains

    Paul McLellan
    Paul McLellan
    The final keynote at this year's DATE was by Pascal Traverse of Airbus, titled Autonomy: One Step Beyond on Commercial Aviation. This was part of this year's DATE's two-day special initiative on Autonomous System Design (ASD)...not t...
    • 8 Feb 2021
  • Breakfast Bytes: Sunday Brunch Video for 7th February 2021

    Paul McLellan
    Paul McLellan
    https://youtu.be/WUEvcW8Isxc Made on my balcony (camera Carey Guo) Monday: It's Mars Month Tuesday: SEMI Industry Strategy Symposium: The Outlook Wednesday: SEMI Industry Strategy Symposium: The Technology Thursday: A History of Semicon...
    • 7 Feb 2021
  • Digital Design: Library Characterization Tidbits: Recovering from Failures in the Multi-PVT Characterization Flow

    Rajni
    Rajni
    Ever wondered what should you do if any arc, cell, or PVTs failed in a characterization run? Do you need to rerun the entire characterization process? Certainly not if you know about how to use the recovery workflow in the multi-PVT characterization flow! Read more...
    • 5 Feb 2021
  • Breakfast Bytes: A History of the Mouse

    Paul McLellan
    Paul McLellan
    I was idly watching YouTube over the break when "the algorithm" recommended that I watch a Computerphile video called How the Mouse Works. In some ways, it is a history of the computer mouse. But the history of the mouse goes back a lot fur...
    • 5 Feb 2021
  • 定制IC芯片设计 : Virtuoso Video Diary: “Training bytes” 助推知识传播—第3部分

    Parula
    Parula
    摘要:当今,在单个设计中使用多种测试平台比以往任何时候都更为重要。因此在接下来的博客中,我们将介绍与Virtuoso ADE Product Suite 相关的使用技巧及提示,涵盖Virtuoso ADE Explorer, Virtuoso ADE Assembler 和Virtuoso ADE Verifier 等.
    • 5 Feb 2021
  • カスタムIC/ミックスシグナル: Virtuosity: Cadence製品全体のユーザーインターフェイスを改善するDesign Thinkingの取り組み

    Custom IC Japan
    Custom IC Japan
    私達は、ユーザビリティに対するアイデアが、製品を使いやすく、アクセスをさらに容易にし、視覚的に魅力的なものにする世界に住んでいます。製品の使いやすさを向上させるために、私達は絶え間ない努力を行っています。毎月ここに投稿するVirtuoso® Layout Suiteのユーザビリティ改善に注目してください。 このブログ・シリーズでは、今まで、ユーザー体験と生産性の向上のためにCadence®製品全体で行われた、多くのユーザビリティ改善について説明しました。今回は、ケイデンス全体のチ...
    • 4 Feb 2021
  • Breakfast Bytes: A History of Semiconductor IP

    Paul McLellan
    Paul McLellan
    I like to claim that I was in the IP Business before the name IP was used for semiconductor components. When VLSI Technology spun out Compass Design Automation as a separate company, in addition to all the EDA software, Compass also inherited what we...
    • 4 Feb 2021
  • Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes - Part 5

    Parula
    Parula
    Continuing our momentum with the Knowledge Booster blogs in the year 2021 , this blog informs you how to overcome DC Convergence issues and errors for a Spectre Simulation by modifying associated parameters.
    • 4 Feb 2021
  • System, PCB, & Package Design : BoardSurfers: The New 17.4-2019 Dynamic Shape 'Fast' Mode is Truly Fast!

    BarbS
    BarbS
    This year, it’s the new Fast shape mode, and I feel like I need to talk about it because it is a game-changer in working with positive shapes when it comes to performance and the display quality of shapes. The more etch shapes you have or the larger the database with positive shapes, the slower...
    • 3 Feb 2021
  • Analog/Custom Design: Virtuoso ICADVM20.1 ISR16 and IC6.1.8 ISR16 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The ICADVM20.1 ISR16 and IC6.1.8 ISR16 production releases are now available for download.
    • 3 Feb 2021
  • Breakfast Bytes: SEMI Industry Strategy Symposium: The Technology

    Paul McLellan
    Paul McLellan
    At the recent SEMI Industry Strategy Symposium, the second day had a section devoted to technology. I covered some of the first day in my earlier post SEMI Industry Strategy Symposium: The Outlook. In the technology section, there were three presenta...
    • 3 Feb 2021
  • PCB設計/ICパッケージ設計: BoardSurfers: 'Extracta'を利用してAllegroデータベースを読み取り可能なフォーマットに変換

    SPB Japan
    SPB Japan
    PCBデザインを開発する過程においては、多くのエキスパートたちが設計の検証に関わります。 これらのエキスパートやその他のさまざまな関係者は、自社または製造会社に所属していて、PCB設計プロセスの特定の側面に関心を持っています。関連するデータをそれぞれの関係者やさまざまなドメインのエキスパートと共有することは、適切なフィードバックを受け取るために大変重要であり、これは、PCB設計ソフトウェアのデータ抽出機能に大きく依存します。Cadence Allegro® レイアウトエディターは、バイナ...
    • 2 Feb 2021
  • System, PCB, & Package Design : IC Packagers: An Introduction to Off-Grid Degassing

    Tyler
    Tyler
    All of you doing advanced node package or silicon interposer substrate design in Allegro® Package Designer know what degassing is. And, while we talked last summer about massive performance improvements (plus additional information in show elemen...
    • 2 Feb 2021
  • Breakfast Bytes: SEMI Industry Strategy Symposium: The Outlook

    Paul McLellan
    Paul McLellan
    In mid-January, SEMI organizes the two-day Industry Strategy Symposium. Normally, this is held in the Hyatt Regency in Half Moon Bay. Due to space constraints, they let very few press into the event. When I worked for Semiwiki, SEMI would give u...
    • 2 Feb 2021
  • RF /マイクロ波設計: 新しいホワイトペーパーで、5G / 6G設計の課題に対する弊社ソフトウェアの機能を紹介

    RF Design Japan
    RF Design Japan
    eMBB向けの新しい5GNR設計 次世代の5G/6G通信システムは、極端な容量、カバレッジ、信頼性、および超低遅延でインターネットへの大規模な接続を提供し、革新的な技術によって可能になった幅広い新しいサービスを可能にします。拡張モバイルブロードバンド(eMBB)は、10 Gbpsを超える次数の高いデータスループット、LTEの1000倍を超える次数の高いシステム容量、およびLTEよりもはるかに優れたスペクトル効率(3〜4倍)で現在のモバイル経験を拡張します。 このホワイトペーパーでは、eMBB製品...
    • 1 Feb 2021
  • RF Engineering: New White Paper Showcases Capabilities in Cadence Software for 5G/6G Design Challenges

    TeamAWR
    TeamAWR
    A new “5G NR Design for eMBB” white paper showcases the unique system and circuit capabilities in Cadence software that overcome eMBB design challenges.
    • 1 Feb 2021
  • Breakfast Bytes: It's Mars Month

    Paul McLellan
    Paul McLellan
    Last July, in the midst of the global pandemic, three spacecraft were launched to escape our globe. They were bound for Mars. There is a reason they were all launched around the same time. Mars goes around the Sun roughly half as fast as the Earth do...
    • 1 Feb 2021
  • Analog/Custom Design: Spectre Tech Tips: Using Spectre X for RF Analyses

    Stefan Wuensche
    Stefan Wuensche
    In the Spectre 20.1 base release at the end of September 2020, we released Spectre X-RF. The Spectre X-RF technology integrates the Spectre X engine into Spectre’s RF analyses. In this blog, we introduce the Spectre X-RF technology.
    • 29 Jan 2021
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