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PCB解析／ICパッケージ解析: Sigrity / Systems Analysis 2021.1 HF3リリース(2021年9月) - 新機能ハイライト

SPB Japan

Sigrity & Systems Analysis (SIGRITY/SYSANLS) 2021.1 HF3リリースが Cadence Downloads サイトからダウンロード可能となりました。2021.1 HF3リリースで改修された項目は、インストールフォルダに含まれているREADME.txtをご参照ください。 SIGRITY/SYSANLS 2021.1 HF3 SIGRITY/SYSANLS 2021.1 HF3リリースの主要なアップデート内容をいくつかリストし...
- 7 Nov 2021
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Clarity 3D Workbenchとは？

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。電気CADエンジニアは、自動車やIoTなどの業界向けの製品を設計します。そのタスクには、ICパッケージとプリント基板（PCB）との接合、...
- 7 Nov 2021
Breakfast Bytes: Sunday Brunch Video for 7th November 2021

Paul McLellan

https://youtu.be/rfVN6CA6LjQ Made in Pacifica (camera Carey Guo) Monday: Designing Planet-Scale Video Chips on Google Cloud Tuesday: Jasper User Group Preview Wednesday: Palladium Z2 Wins an ACE Award Thursday: Semiconductor Numbers Everyone Should K...
- 7 Nov 2021
Breakfast Bytes: IEDM Preview 2021

Paul McLellan

The big event for semiconductor process news is IEDM, the International Electron Devices Meeting. This year it will take place from December 11 to 15 at its usual location, the San Francisco Hilton Hotel as an in-person event. Then on-demand access t...
- 5 Nov 2021
Breakfast Bytes: Semiconductor Numbers Everyone Should Know

Paul McLellan

I wrote a post a couple of years ago Numbers Everyone Should Know. It was about timing of things in microprocessor-based systems, in particular the huge disparity between the cycle-time of a modern processor and the time required to access DRAM, let ...
- 4 Nov 2021
Computational Fluid Dynamics: A New Era of Sustainable Ecotourism Through Design Optimization of Whale Watching Vessels

AnneMarie CFD

Author: Nic de Waal, Managing Director,Teknicraft Design Based in New Zealand on the Kaikōura Peninsula, Whale Watch provides sustainable ecotourism services for exploring and observing whales, dolphins, seals, and other mammals in their natur...
- 4 Nov 2021
中文技术专区: Cadence Palladium Z2企业级硬件仿真平台荣获全球电子成就奖

FormerMember

2021 年 11 月 3 日，由全球电子技术领域知名媒体集团 ASPENCORE 举办的“ASPENCORE 全球高科技领袖论坛 - 全球双峰会”在深圳隆重举行。在当天晚上举办的“全球电子成就奖”颁奖礼上，楷登电子（美国 Cadence 公司）Cadence® Palladium® Z2 企业级硬件仿真平台及 Cadence® Cerebrus Intelligent Chip Explorer 入选该奖项。...
- 3 Nov 2021
Breakfast Bytes: Palladium Z2 Wins an ACE Award

Paul McLellan

A few years ago, the Palladium Z1 Enterprise Emulation Platform won an ACE award. Technically, it was the design team that won "Design Team of the Year". You can read what I wrote about it back then in my post ACE Awards: Palladium Z1 Team Is Design ...
- 3 Nov 2021
Academic Network: Cadence Great Support to Taiwan National IC Design Competition

Tracy Zhu

The Taiwan National IC Design was a great opportunity for Cadence and the Academic Network to build our brand with students, connect with academia and attract top talent in Taiwan. This was the fourth year that we sponsored the competi...
- 2 Nov 2021
System, PCB, & Package Design : Cadence and Nvidia to Address EMC Simulation Challenges Using GPU Computing at EMC Live 2022

Sigrity

If you have ever had your car audio impacted by driving by power lines, you have experienced electromagnetic interference (EMI). If you have ever had to close your laptop for takeoff or landing, you’ve seen how serious the airline industry is a...
- 2 Nov 2021
System, PCB, & Package Design : BoardSurfers: Exchanging Layer Stackup Data Using IPC-2581

vignesh k

Sharing design intent and stackup information with your manufacturer at the beginning of the design process avoids manufacturing and assembly issues that may impact the product design, and eventually, delay the product delivery. However, without havi...
- 2 Nov 2021
Breakfast Bytes: Jasper User Group Preview

Paul McLellan

I have been going to the Jasper User Group for years. Before Cadence acquired Jasper, I worked for Semiwiki and Jasper was one of the accounts I covered. So I would make the annual trek to Cupertino, before it moved to the Cadence auditorium, before ...
- 2 Nov 2021
RF /マイクロ波設計: マイクロ波製品ダイジェスト（MPD）の記事でAWR Design Environment V16ソフトウェアを紹介

RF Design Japan

5G無線システムと接続されるデバイスは、今日、考えられるすべての業界で急増しています。運転技術のリーダーは、性能、サイズ、およびコストによって定義および差別化されたRF対応の製品の市場機会を活用しています。設計者は、より小さなフットプリントでより優れた機能を実現するために異なる技術の統合を採用しており、設計プラットフォームと複数技術のワークフローの相互運用を可能にする必要性が高まっています。弊社のAWR Design Environment V16リリースでは革新的な機能を提供しています。これは...
- 2 Nov 2021
RF Engineering: Cadence AWR Design Environment Empowers RF/Microwave System Design

TeamAWR

Microwave Product Digest (MPD) Article Features AWR Design Environment V16 Software 5G wireless systems and connected devices are proliferating across every imaginable industry today, driving technology leaders to capitalize on market opportunities ...
- 1 Nov 2021
Breakfast Bytes: Designing Planet-Scale Video Chips on Google Cloud

Paul McLellan

In the last couple of months, I have attended two presentations about Google's video-encoder chip for YouTube videos. The motivation for Google to create this chip is easy to understand. Approximately a zillion videos per minute are uploaded to Y...
- 1 Nov 2021
Breakfast Bytes: Sunday Brunch Video for 31st October 2021

Paul McLellan

https://youtu.be/GuGgaH72-6U Made at Calistoga in Napa CA (camera Carey Guo) Monday: Semiconductor 101...and Sunday Brunch Tuesday: TSMC OIP: 3DFabric and Integrity 3D-IC Wednesday: October Update: GPTW, Intel Fabs, and More Thursday: Always Lis...
- 31 Oct 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

Despite this being the Halloween time of year, this week's roundup of CFD news isn't so scary. In fact it's full of good news. Several upcoming events will either be 100% in-person or hybrid. A lot of organizations, including Caden...
- 29 Oct 2021
System, PCB, & Package Design : IC Packagers: Module Support in IC Package Design

avijeet

It is quite common to reuse memory stacks across designs. These memory stacks are created as modules (.mdd) and saved in a library, which can then be used in different package designs. You can place a memory stack module depending on the capacity of ...
- 28 Oct 2021
Verification: Why is Ethernet Time-sensitive Networking (TSN) Adaptation So Rapid in the Automotive Industry?

Krunal Patel

At a particular point in time, the automotive industry continued to add more and more sensors and electronic control units to vehicles. All these sensors and actuators used to connect through CAN and LIN buses. However, since the introduction of IVN (In-Vehicle Network), the industry has started replacing these buses with automotive ethernet. According to NXP, “Ethernet enables broadband connectivity with the necessary…
- 28 Oct 2021
Breakfast Bytes: Always Listening, HiFi 1 DSP

Paul McLellan

Today, at the Linley Processor Conference, we announced the latest addition to the HiFi DSP family, the Tensilica HiFi 1 DSP. This joins the existing products: HiFi 3 DSP, HiFi 3z DSP, HiFi 4 DSP, and HiFi 5 DSP. As you might guess fro...
- 28 Oct 2021
Life at Cadence: My Life at Cadence: Guillaume Foix

Lautanen

Cadence was recently ranked #7 on Newsweek’s Most Loved Workplaces list for 2021 and #17 on Fortune’s World’s Best Workplaces list. Cadence received top recognition among thousands of other companies based on our global surveys that...
- 27 Oct 2021
Breakfast Bytes: October Update: GPTW, Intel Fabs, Apple, and More

Paul McLellan

These monthly updates normally occur on the last Friday of the month, but that is a Cadence Global Recharge Day so I won't be working. It turns out we have a product announcement tomorrow, so today is the last practical day before the last Friday of ...
- 27 Oct 2021
カスタムIC／ミックスシグナル: Virtuoso Meets Maxwell: EMX Planar 3D Solverでのメッシュの表示

Custom IC Japan

'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC...
- 26 Oct 2021
System, PCB, & Package Design : BoardSurfers: Training Insights: Manually Placing Components in Allegro PCB Editor

Taanya

Component placement is one of the most critical aspects of PCB designing. As the number of components and layers increases, the complexities of placing components increase manifold. Allegro PCB Editor, with its streamlined and efficient component placement...
- 26 Oct 2021
定制IC芯片设计 : Virtuoso Meets Maxwell：通过库实现系统分析和物理实现

Guru Rao

欢迎阅读这篇博文了解如何创建组件和padstack库，以用于以Virtuoso 平台为驱动的多工艺流程。本文所描述的工具类似图书管理员的工作，它们必须通过各种途径来组装组件IP，并创建可供设计人员使用的视图及文档。
- 26 Oct 2021

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