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Digital Design: SSV 22.1 Base Release Now Available

SSV Release Team

The Silicon Signoff and Verification (SSV) 22.1 release is now available for download.
- 9 Sep 2022
Digital Design: Training Insights – Design Robustness Analysis Application: Aging-Aware STA

sakshin

This blog post describes the phenomenon of Aging, the factors affecting it, and how Cadence solves this problem with its groundbreaking Aging-Aware STA technology enabled using Liberate, Spectre, and Tempus STA.
- 9 Sep 2022
Breakfast Bytes: The AI Hardware Summit 2022

Paul McLellan

This year's AI Hardware Summit is coming up next week from 13th to 15th September at the Santa Clara Marriott. Cadence is a platinum sponsor of the event, and is participating in various ways. Here's a summary of why you should attend the summi...
- 9 Sep 2022
Life at Cadence: Lightelligence Powers the Next Generation of Innovations Using Integrity 3D-IC

Corporate

As an alternative to traditional electronic computing, Lightelligence has come up with a more sustainable way of powering technology—optical computing. Using the speed, power, and efficiency of light, Lightelligence is developing a new computi...
- 8 Sep 2022
Breakfast Bytes: Semiconductor 101: New Video

Paul McLellan

For several years now, I have given a presentation that started off under the name EDA 101 but has now become more accurately titled Semiconductor 101. Originally, I created this for internal consumption at Cadence and it was very well received....
- 8 Sep 2022
PCB解析／ICパッケージ解析: Sigrity / Systems Analysis 2022.1 HF2リリース (2022年8月) - 新機能ハイライト

SPB Japan

Sigrity & Systems Analysis (SIGRITY/SYSANLS) 2022.1 HF2リリースが Cadence Downloads サイトからダウンロード可能となりました。このリリースで改修されたCCR項目については、インストールフォルダに含まれているREADME.txtをご参照ください。 SIGRITY/SYSANLS 2022.1 HF2 SIGRITY/SYSANLS 2022.1 HF2リリースの主要なアップデート内容をいくつかリストしました。この...
- 8 Sep 2022
Life at Cadence: Formula 1: We Don’t Want Flying Cars - What F1 Teaches Us About Aerodynamics

Corporate

Formula 1 car design requires extensive analysis of aerodynamics. Computational Fluid Dynamics can help engineers perform this analysis to achieve optimal car designs.
- 7 Sep 2022
System, PCB, & Package Design : BoardSurfers: Managing Design Constraints Efficiently Using Constraint Sets

Dhruv Prakash

A constraint is a user-defined property, or a rule, applied to a physical object, such as a net, pin, or via in a design. There are a number of constraints that can be applied to an object based on its type and behavior. For example, you can define t...
- 7 Sep 2022
Breakfast Bytes: Books: Hyperscale and Automotive

Paul McLellan

I wrote a book! To be more precise, I worked with co-authors to write two books. In past years, I have done a sort of "Best of Breakfast Bytes" with about 25 posts from the previous year. I did this at the start of last year, and publicized the book ...
- 7 Sep 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Cadence Celsius Thermal Solver: FEAとCFDによる完全な熱ソリューション

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。最新の電子システムが小型化に向かって進化するにつれて、電子部品の貢献はすべての業界で日々増加しており、需要が増加するにつれて、何十億ものトランジス...
- 7 Sep 2022
System, PCB, & Package Design : This Month in IDA

Sherry Hess

IDA activities in August showcased two video interviews with David Maliniak of Microwaves & RF magazine. New posts, datasheets, application notes and white papers highlight multiphysics analysis spanning SI, PI, thermal, EM and microwave analysis domains are also featured.
- 6 Sep 2022
Life at Cadence: Analog, RF, and Photonics into One System: The Best Way to Integrate

Corporate

Modern Chip Architects are balancing more demands than ever as they design whole systems, which is a lot more than just designing a digital chip. They must consider analog, radio frequency (RF), photonics, advanced packaging, signal integrity, c...
- 6 Sep 2022
Breakfast Bytes: HOT CHIPS Day 1: Hot Chiplets

Paul McLellan

I've said before that HOT CHIPS is one of the best places to absorb the zeitgeist of what is going on in the most advanced chip designs. After all, at HOT CHIPS, the presentations are about many of the most advanced designs in any given yea...
- 6 Sep 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: PCIe 5.0の初期設計サインオフを迅速化させるTopology WorkbenchのPCIe 5.0コンプライアンスキット

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence® が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。 Peripheral Component Interconnect express (PCIe)は、高帯域幅とデータ転送のパラダイムシフトを組み込...
- 4 Sep 2022
Computational Fluid Dynamics: Quilting for Easier Meshing!

Veena Parthan

Fidelity Pointwise includes the concept of meshing regions defined on the CAD level, known as quilts. Quilts provide a watertight representation of the geometry that hides unnecessary complex topology in the underlying geometry and reduces the meshing regions.
- 4 Sep 2022
Life at Cadence: Ever-Expanding Applications and Markets Provide Opportunity to Drive Diversity in the EDA Workforce

Paul Scannell

I recently saw a compelling ad on TV by an iconic social media company that served as an “ah-ha!” moment for me relative to the challenges that we face in electronic design automation (EDA): How can we accelerate diversity, equity, and in...
- 1 Sep 2022
Breakfast Bytes: Offtopic: Austria for Canoes and Mask Writing

Paul McLellan

It's Labor Day on Monday here in the US, a day that traditionally marks the end of summer. Although if you live in California, and not in the mountains, we pretty much have summer all year round. But isn't today Thursday? Indeed it is. Friday is a gl...
- 1 Sep 2022
Life at Cadence: Madhu’s Journey to Returnship

Michelle Hoffmann

Cadence provides diversified opportunities to pursue a career in tech and our Returnship Program has been collectively successful in providing a means for engineers to re-enter the workforce after a career break. Our Returnship Program provides relev...
- 31 Aug 2022
Digital Design: Brain on Fire - AI/ML Art Creation

FormerMember

No matter how you feel about the topic, we're definitely past the turning point in history where most humans interact with machines much more than other humans.

Advancements in artificial intelligence and machine learning (AI/ML) have helped us develop immensely useful and sometimes just-for-fun applications including image creations with AI inputs.

Look at these images generated from text for example, with some weights…
- 31 Aug 2022
Verification: Flash Toggle NAND 4.0 in a Nutshell

GauravJ

NAND Flash memory is now a widely accepted non-volatile memory in many application areas for data storage such as digital cameras, USB drive, SSD and smartphones. One form of NAND flash memory, Toggle NAND, was introduced to transmit high-speed data asynchronously thus consuming less power and increasing the density of the NAND flash device.

The initial Toggle NAND versions had memory arranged in terms of SLC (Single Level…
- 31 Aug 2022
Life at Cadence: Formula 1: Hybrid Era & System-Level Power Usage Optimization

Corporate

Understand how Cadence helps at the system level with power usage optimization in modern devices.
- 31 Aug 2022
Breakfast Bytes: Space Debris and the Kessler Syndrome

Paul McLellan

One of the YouTube channels that I am subscribed to is SpaceX. But it's gotten very boring. Every few days, a new launch of 40-50 Starlink satellites takes place, sometimes from the East coast, sometimes from the West. There are close to 3,000 St...
- 31 Aug 2022
カスタムIC／ミックスシグナル: Virtuoso Meets Maxwell: Virtuoso RF SolutionのAssisted Flowの完成

Custom IC Japan

'Virtuoso Meets Maxwell' はVirtuoso RF ソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのI...
- 30 Aug 2022
カスタムIC／ミックスシグナル: Virtuosity: カスタムIC設計フロー／手法 - 回路物理検証と寄生抽出

Custom IC Japan

カスタム／ミックスドシグナル設計における現在の課題は、高速でシリコン精度の高い手法を持つことです。このブログ・シリーズでは、カスタムICの設計フローと手法の段階についてご紹介します。この手法は、設計プロセスを通じてスピードとシリコン精度を最大化することで、これらのIC設計の作成における予測可能性という主要な課題に直接対処します。また、この手法は、アナログ、カスタム・デジタル、RFの主要な設計領域をカバーし、デジタル・スタンダードセル・ブロックとの統合をサポートします。設計フローの段階下図は、...
- 30 Aug 2022
System, PCB, & Package Design : Quickchat Video Interview: Introducing Cadence Optimality and OnCloud for Systems Analysis and Signoff

Sherry Hess

Microwaves & RF's David Maliniak interviews Sherry Hess of Cadence about recently announced products of Optimality and OnCloud.
- 30 Aug 2022

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