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RF Engineering: O-M-Gosh, I’ve Been Zeked! (Part 1)

Sherry Hess

by Sherry Hess In this new blog series, Max Maxfield gets to know Zeke, an amazing 11-year-old with a dream to speak with the astronauts on the International Space Station (ISS). His first step on this journey however began with becoming a HAM r...
- 13 Sep 2022
System, PCB, & Package Design : Modern Thermal Analysis Overcomes Complex Electronic Design Issues

Sherry Hess

By combining finite element analysis with computational fluid dynamics, designers can perform complete thermal system analysis using a single tool.
- 13 Sep 2022
Breakfast Bytes: Verisium AI-Driven Verification Platform

Paul McLellan

Ever since Tim O'Reilly popularized the term Web 2.0 by starting the Web 2.0 Conference, major changes are often tagged with a version number as if they are software releases. Well, Cadence is making not just one, but two announcements that hera...
- 13 Sep 2022
Life at Cadence: AI-Enabled Data Analytics Is Critical to Semi Revenue Growth and Engineering Productivity

Venkat Thanvantri

The semiconductor industry has been experiencing strong growth during the past decade. The explosion in new technologies such as 5G connectivity, artificial intelligence, hyperscale computing and autonomous vehicles has been driving demand for new s...
- 13 Sep 2022
Life at Cadence: Investing in the Next Generation Today, Pays Dividends Tomorrow

Neil Zaman

The pace of innovation never slows down, which is why I find it important to pause and look at the impact to the next generation. At Cadence, we have been building a foundation of delivering incredible technology, which includes partnering with custo...
- 13 Sep 2022
Spotlight Taiwan: CadenceLIVE專題演講精彩回顧: AI驅動的系統設計分析和優化

candyyu

睽違兩年，CadenceLIVE Taiwan今年在9月1日舉辦，特別邀請Cadence多物理系統分析事業群研發副總裁Ben Gu來台蒞臨盛會，暢談Cadence如何進一步完善智慧系統設計(Intelligent System Design)策略，並分享晶片、系統、智能環環相扣的開發藍圖與系統創新技術，以及持續提升優化效能、支持客戶設計的新一代平台與解決方案。Ben Gu在CadenceLIVE專題演講『AI驅動的系統設計分析和優化(AI-Driven System Design, Analys...
- 12 Sep 2022
Spotlight Taiwan: CadenceLIVE Taiwan 2022 驅動智慧系統的新時代!

candyyu

今年CadenceLIVE Taiwan以多場技術趨勢、創新應用的演講饗宴，分享全流程的EDA設計解決方案，涵蓋從晶片設計、系統封裝設計、物理特性模擬與系統分析解決方案等精彩內容，集結Cadence合作夥伴、業界領袖、技術用戶及開發人員，成功激盪出更具活力創意、跨領域的電子設計!大會首先由Cadence台灣總經理宋栢安致歡迎詞開場，他提到EDA已經由「電子設計自動化(Electronic Design Automation)」轉變成為「“Essential” Desig...
- 12 Sep 2022
Breakfast Bytes: HOT CHIPS Day 2: AI...and More Hot Chiplets

Paul McLellan

My post about the first day of HOT CHIPS appeared yesterday. See HOT CHIPS Day 1: Hot Chiplets. The second day seemed almost like Tesla day, with two presentations on various aspects of DOJO and the day's keynote, Beyond Compute - Enabl...
- 12 Sep 2022
Computational Fluid Dynamics: Construct Unstructured Block Assembly with Fidelity Pointwise

Veena Parthan

With Fidelity Pointwise, one can skin a block, manually or automatically, using structured or unstructured block assembly. Learn when to use manual or automatic block assembly from this blog article.
- 12 Sep 2022
Verification: TSN-PTP: A Real-Time Network Clock Synchronizing Protocol

Vedansh Seth

In a network containing multiple nodes, the need for synchronization between the various nodes is not just instrumental but also a complicated and highly complex process. This process becomes even more tricky if we synchronize the clocks between the Manager and the Peripheral. As we know, in a real-time network, some of the nodes would behave like Managers while some would be a Peripheral. If we must make the communication…
- 11 Sep 2022
Academic Network: Status of Academic Education in 2022

Anton Klotz

Teaching is easy, teaching with a learning effect is hard Opening statement of a GeCON 2022 panel session I attended the IEEE GeCon conference in Berlin, the first conference organized by IEEE where professors from all over Germany and abroad got to...
- 9 Sep 2022
Digital Design: SSV 22.1 Base Release Now Available

SSV Release Team

The Silicon Signoff and Verification (SSV) 22.1 release is now available for download.
- 9 Sep 2022
Digital Design: Training Insights – Design Robustness Analysis Application: Aging-Aware STA

sakshin

This blog post describes the phenomenon of Aging, the factors affecting it, and how Cadence solves this problem with its groundbreaking Aging-Aware STA technology enabled using Liberate, Spectre, and Tempus STA.
- 9 Sep 2022
Breakfast Bytes: The AI Hardware Summit 2022

Paul McLellan

This year's AI Hardware Summit is coming up next week from 13th to 15th September at the Santa Clara Marriott. Cadence is a platinum sponsor of the event, and is participating in various ways. Here's a summary of why you should attend the summi...
- 9 Sep 2022
Life at Cadence: Lightelligence Powers the Next Generation of Innovations Using Integrity 3D-IC

Corporate

As an alternative to traditional electronic computing, Lightelligence has come up with a more sustainable way of powering technology—optical computing. Using the speed, power, and efficiency of light, Lightelligence is developing a new computi...
- 8 Sep 2022
Breakfast Bytes: Semiconductor 101: New Video

Paul McLellan

For several years now, I have given a presentation that started off under the name EDA 101 but has now become more accurately titled Semiconductor 101. Originally, I created this for internal consumption at Cadence and it was very well received....
- 8 Sep 2022
PCB解析／ICパッケージ解析: Sigrity / Systems Analysis 2022.1 HF2リリース (2022年8月) - 新機能ハイライト

SPB Japan

Sigrity & Systems Analysis (SIGRITY/SYSANLS) 2022.1 HF2リリースが Cadence Downloads サイトからダウンロード可能となりました。このリリースで改修されたCCR項目については、インストールフォルダに含まれているREADME.txtをご参照ください。 SIGRITY/SYSANLS 2022.1 HF2 SIGRITY/SYSANLS 2022.1 HF2リリースの主要なアップデート内容をいくつかリストしました。この...
- 8 Sep 2022
Life at Cadence: Formula 1: We Don’t Want Flying Cars - What F1 Teaches Us About Aerodynamics

Corporate

Formula 1 car design requires extensive analysis of aerodynamics. Computational Fluid Dynamics can help engineers perform this analysis to achieve optimal car designs.
- 7 Sep 2022
System, PCB, & Package Design : BoardSurfers: Managing Design Constraints Efficiently Using Constraint Sets

Dhruv Prakash

A constraint is a user-defined property, or a rule, applied to a physical object, such as a net, pin, or via in a design. There are a number of constraints that can be applied to an object based on its type and behavior. For example, you can define t...
- 7 Sep 2022
Breakfast Bytes: Books: Hyperscale and Automotive

Paul McLellan

I wrote a book! To be more precise, I worked with co-authors to write two books. In past years, I have done a sort of "Best of Breakfast Bytes" with about 25 posts from the previous year. I did this at the start of last year, and publicized the book ...
- 7 Sep 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Cadence Celsius Thermal Solver: FEAとCFDによる完全な熱ソリューション

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。最新の電子システムが小型化に向かって進化するにつれて、電子部品の貢献はすべての業界で日々増加しており、需要が増加するにつれて、何十億ものトランジス...
- 7 Sep 2022
System, PCB, & Package Design : This Month in IDA

Sherry Hess

IDA activities in August showcased two video interviews with David Maliniak of Microwaves & RF magazine. New posts, datasheets, application notes and white papers highlight multiphysics analysis spanning SI, PI, thermal, EM and microwave analysis domains are also featured.
- 6 Sep 2022
Life at Cadence: Analog, RF, and Photonics into One System: The Best Way to Integrate

Corporate

Modern Chip Architects are balancing more demands than ever as they design whole systems, which is a lot more than just designing a digital chip. They must consider analog, radio frequency (RF), photonics, advanced packaging, signal integrity, c...
- 6 Sep 2022
Breakfast Bytes: HOT CHIPS Day 1: Hot Chiplets

Paul McLellan

I've said before that HOT CHIPS is one of the best places to absorb the zeitgeist of what is going on in the most advanced chip designs. After all, at HOT CHIPS, the presentations are about many of the most advanced designs in any given yea...
- 6 Sep 2022
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: PCIe 5.0の初期設計サインオフを迅速化させるTopology WorkbenchのPCIe 5.0コンプライアンスキット

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence® が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。 Peripheral Component Interconnect express (PCIe)は、高帯域幅とデータ転送のパラダイムシフトを組み込...
- 4 Sep 2022

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