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Computational Fluid Dynamics: Cadence is Funding Research on Adaptive Meshes for High-Speed Flows

John Chawner

This past summer, Cadence began funding research at the Massachusetts Institute of Technology (MIT) and the University of Tennessee at Knoxville (UTK) on a topic of significant current interest to the aerospace CFD community: mesh adaptation for high...
- 9 Dec 2021
Breakfast Bytes: Always-On Devices

Paul McLellan

One problem with battery-powered devices is that we increasingly expect them to interact with us without us pressing physical buttons. Our phone knows it is in our pocket. We can wake it up with a wake-word. Smart doorbells need to decide if there is...
- 9 Dec 2021
Digital Design: Voltus Voice: ESD Analysis Task Assistant: Your Key to 'Getting Started'

Anshika Gahlaut

This blog discusses the implementation of task assistant for the Voltus ESD analysis flow. ESD task assistant is an in-tool help access medium that facilitates the quick resolution of your ESD questions.
- 9 Dec 2021
Analog/Custom Design: Virtuosity: Tagging Variables and Corners in Virtuoso ADE Assembler

shubhangi upadhyay

You can now assign tags to variables and corners in Virtuoso ADE Assembler. Check out this blog to find out.
- 9 Dec 2021
Computational Fluid Dynamics: Webinar: Simulation of Hydraulic Turbines with Omnis CFD Platform

John Chawner

Join CadenceTECHTALK on December 15! Improving the design of modern turbomachinery requires highly accurate numerical simulations as they contain complex flow features that affect the performance of the machine. One such phenomena is the vortex rope...
- 8 Dec 2021
Computational Fluid Dynamics: More Control and Better Meshes in Pointwise Version 18.5

John Chawner

Automation in CFD mesh generation is of limited use if the resulting mesh isn’t suitable for the intended simulation. One of the many aspects of suitability is mesh quality, the distortion and skewness of the mesh elements relative to a perfect...
- 8 Dec 2021
Breakfast Bytes: The Cadence DAC Theatre...in Your Living Room

Paul McLellan

Historically at DAC, a large part of the booth was taken up by the Cadence Theatre where customers (and some Cadence people) would present their experiences in different market segments and with different tools. We decided this year to do it on video...
- 8 Dec 2021
Life at Cadence: My Life at Cadence: Sebastien Caussette

Lautanen

At Cadence, our strength as a company comes from our innovative ideas, collaborative spirit, and, most importantly, our connections with one another. Although many of us are working remotely, we have continued to find new ways to work together and dr...
- 8 Dec 2021
The India Circuit: Join Cadence at DVCon India 2021 Next Week!

Madhavi Rao

It's almost time for the event that Design and Verification engineers have been waiting for - DVCon India. Now in the 6th year, the Design and Verification Conference, or DVCon, is one of the premier industry conferences that can't be missed....
- 7 Dec 2021
System, PCB, & Package Design : (P)SpiceITUp: Using Curve-Fitting to Optimize a Design

mrigashira

If you are interested in the performance of a circuit that can be best described by a waveform instead of a value, say a practical filter circuit response, curve-fitting is the choice. You can use an external specification composed of measurement data defined in an external data file ...
- 7 Dec 2021
Breakfast Bytes: Cadence Endowments in Academia

Paul McLellan

Cadence has a long history of involvement with academia, going all the way back to the founding of SDA and the involvement of Alberto. In EDA, he's like Madonna and only needs a first name, partially because his real name is so long and his title...
- 7 Dec 2021
PCB設計／ICパッケージ設計: ASCENT: 17.4-2019 Hotfix 019以上に移行すべき更なる理由とは

SPB Japan

前回のブログに続き、Hotfix 019で新たに追加された興味深い変更点を見てみましょう。Allegro® System Captureは、一人で作業する設計者でも、小規模なチームに属する設計者でも、あるいは企業の大規模なチーム、分散したチームで仕事をしている設計者でも、誰でも利用することができます。回路設計機能のほとんどの部分は設計者にとって同じように機能しますが、一部の拡張機能は大規模な体制で利用される場合に有効に機能します。たとえば、一般的に、小規模な組織で作業する設計者はライブラ...
- 6 Dec 2021
Verification: From AMBA ACE to CHI, Why Move for Coherency?

MinL

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from existing AXI protocol, to satisfy the cache coherency maintenance demands of SOCs with multi core processors and shared caches in smart phones, mobile computers, and servers. It added new channels for cache communication, extra signals to allow new transaction for coherency support, and five state model for caches.

AXI + ACE Signals:

ACE was designed…
- 6 Dec 2021
Breakfast Bytes: Automotive Supply Chains

Paul McLellan

I'm sure you've heard that there are lots of supply chain issues. Container ships stacked up outside Los Angeles and Long Beach ports. A shortage of truck drivers. Empty containers all on the wrong side of the Pacific. But generally speaking,...
- 6 Dec 2021
Spotlight Taiwan: Cadence Sigrity X獲選亞洲金選獎(EE Awards Asia)年度EDA最佳產品獎

candyyu

Cadence Sigrity X日前獲選為2021年亞洲金選獎(EE Awards Asia) EDA/IP組別台灣區與亞洲區年度最佳產品獎(Best Product of the Year)。亞洲金選獎頒獎典禮於11月16日(二)舉行。Cadence益華電腦總經理宋栢安出席盛會，並代表Cadence接受此項殊榮。由電子工程專輯(EE Times)、電子技術設計(EDN)專業技術媒體及亞洲網站用戶共同評選的亞洲金選獎，每年表彰對電子創新與發展做出重要貢獻的產品技術解決方案。Sigrity...
- 5 Dec 2021
Spotlight Taiwan: 超越摩爾定律 Cadence以Cerebrus與Integrity 3D-IC擘劃新局

candyyu

Cadence『智慧系統設計』的策略方向下聚焦數位全流程的創新 – 今年推出驅動晶片設計及晶片尺寸未來的『Cerebrus智慧晶片設計工具』及『Integrity 3D-IC設計平台』。Cadence資深副總裁暨數位與簽核事業群總經理滕晉慶博士日前特別受邀越洋媒體團訪，除了分享產業觀點，並介紹這兩款今年推出的全新數位設計產品，剖析其優勢及研發進程。Cadence台灣區總經理宋栢安以及Cadence 3DIC研發處長賴旺霆也共同出席訪談，對產業最新趨勢進行交流。 ...
- 5 Dec 2021
Breakfast Bytes: Sunday Brunch Video for 5th December 2021

Paul McLellan

https://youtu.be/MPbxTioQ2EI Made in Rancho San Antonio Open Space Preserver (camera Carey) Monday: Webinar: Signoff Billion Gates Designs in the Cloud with Cadence, TSMC, and Microsoft Tuesday: 6th Annual Photonics Summit Coming in December Wed...
- 5 Dec 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

Hard to believe it's already December and 11/12ths of a year's worth of CFD is behind us. And with the holidays looming, it's uncertain how many more editions of This Week in CFD are ahead of us. As my Zen friends would say, do not replay...
- 3 Dec 2021
Breakfast Bytes: DAC Preview

Paul McLellan

The annual Design Automation Conference (DAC) is coming up December 5th to 9th, next week. It is in-person in San Francisco's Moscone Center West. It will be available virtually from December 13th until January 1st. To attend in person, you must be f...
- 3 Dec 2021
System, PCB, & Package Design : ASCENT: Managing Designs with Evolving Libraries

Gunjan Goel

Components, or parts, are the basic building blocks of a PCB design. It is of utmost importance that the components present in the design, their graphics, electrical, and part definitions, match the latest and updated li...
- 3 Dec 2021
Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 12 - Using Quview and Connectivity Checker in Quantus

Parula

This blog shows how Quantus Geometry Viewer (Quview) can be used to view various geometries like 3d views of an area generated by Quantus for debugging purposes. In addition, it shows the Connectivity checker which is is a netlist comparison utility to check the connectivity of the Quantus output netlist against the incoming LVS netlist data.
- 2 Dec 2021
Life at Cadence: Commemorating Our Veterans During Veterans Day

Mary Kasik

Creating an environment of respect and appreciation for one another is a core element of Cadence’s culture. On Veterans Day, and all month long, we showed our gratitude for our Veteran employees, their families, our Veteran friends, and all Vet...
- 2 Dec 2021
Breakfast Bytes: November Update: Automotive, Graviton 3, Images, New Fab, and More

Paul McLellan

Because of the Thanksgiving break (and me taking the whole week off), I skipped the regular November Update post, but suddenly there is so much semiconductor news that I'm doing it out of band today even though it is already December. Samsung Fab The...
- 2 Dec 2021
Computational Fluid Dynamics: Unsteady Simulation Of Hydraulic Turbines, Vortex Cores Display And Much More In Omnis Version 5.2

AnneMarie CFD

The newest release of the Cadence Omnis CFD environment is available now and brings better project and file management, more geometry repair tools, multi-block structured meshing and faster Turbo and Open solvers, to name but a few of the advant...
- 2 Dec 2021
System, PCB, & Package Design : System Analysis Knowledge Bytes: SPEEDEM Gets a New Home in Layout Workbench

Shreyansh

Sigrity SPEEDEM technology is uniquely equipped to let you perform a broad range of analysis tasks from a single tool—including interconnect model extraction, signal integrity (SI) and power integrity (PI) studies, and design-stage electromagnetic interference analysis. This blog introduces the updates and enhancements made in Sigrity SPEEDEM in the Sigrity and Systems Analysis 2021.1 HF3 release.
- 2 Dec 2021

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