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Breakfast Bytes: Semiconductor 101...and Sunday Brunch

Paul McLellan

If you have been reading Breakfast Bytes regularly for the last couple of years, you will know that I have a side gig in presenting an introduction to our industry called EDA 101. I wrote a post about this including a video of the 2019 version of the...
- 25 Oct 2021
Digital Design: Voltus Voice: 6 Tips to Jump-start Your Voltus Stylus Migration Journey

Priya E Joseph

Cadence Stylus UI streamlines the RTL-to-Signoff design flow, bringing all the Cadence digital synthesis and implementation tools together with ease. This blog shares tips to seamlessly migrate your Voltus legacy flows to Stylus UI.
- 22 Oct 2021
Breakfast Bytes: Simon Segars: Arm DevSummit Keynote...and Sir Clive Sinclair

Paul McLellan

Earlier this week it was Arm DevSummit (the summit previously known as TechCon). As always, the opening keynote was by the CEO of Arm, Simon Segars. You can watch the keynote at the end of this post. Simon's Journey and Clive Sinclair Simon opene...
- 22 Oct 2021
System, PCB, & Package Design : ASCENT: Workflows in Allegro System Capture

Auromala

Tight deadlines, multiple people working on a design, inevitable errors…there are so many things that can affect the design and development of a PCB. Ensuring a smooth flow of work is easy enough if you are just one designer or a small team. A...
- 22 Oct 2021
Breakfast Bytes: TSMC OIP: N3, N4, and PCIe 6.0

Paul McLellan

Next week is TSMC OIP 2021 (or, to give it its full name, TSMC 2021 Online Open Innovation Platform (OIP) Ecosystem Forum). I will be attending and so you can expect a few blog posts covering the material presented in the coming week or two. In the m...
- 21 Oct 2021
Breakfast Bytes: Line Printers

Paul McLellan

I recently wrote a post Magnetic Tape Drives that you have to be old enough (over 40?) to have ever used. Today, it's all cloud storage and USB thumb drives. I got more emails and more replies on my post on LinkedIn about it than anythi...
- 20 Oct 2021
Computational Fluid Dynamics: Airbus and Cadence Develop A Secure Co-Simulation Platform For Advanced Collaboration

AnneMarie CFD

Image courtesy of Airbus In the scope of the European Union Horizon2020 CleanSky mission, Cadence is working together with Airbus on the Multi-Site Coupled simulation for Advanced collaborative design (MUSICA) project. ...
- 20 Oct 2021
カスタムIC／ミックスシグナル: Spectre Tech Tips: Spectre SQLデータベースでビッグデータを扱う

Custom IC Japan

デザインが大きくなると、シミュレーションによってビッグデータが発生します。データが大きくなればなるほど、後処理やディスクへの効率的な保存が求められます。 Disk Space Spectreには、データを様々なフォーマットで出力する機能がいくつかあります。このブログでは、回路チェックやアサートといった機能に焦点を当てます。大規模な設計では、回路チェックやアサートによる違反が何千件も発生する可能性があります。それぞれの違反は、デバイス名、ノード名、タイミング情報で構成されています。これはリーフレ...
- 20 Oct 2021
Academic Network: Arm’s Education Kit on VLSI Now Available Through Cadence

Anton Klotz

The University program within Arm was established with the aim of fostering an environment where industries can contribute to the education of the next generation of engineers. Their flagship offering to universities worldwide are freely accessi...
- 19 Oct 2021
Learning and Support: Are You Wondering What Logic Synthesis is and How to Deal with its Complex Process? Relax!

MJ Cad

Are you a beginner in the synthesis world? Are you looking for the basic concept of logic synthesis and a solution to address the design synthesis? Relax! We can help you sail through it smoothly! Let's first start with the basic concept. Have yo...
- 19 Oct 2021
Breakfast Bytes: Announcing Cadence Safety Solution and the Midas Platform...Turn Your Automotive Products into Gold

Paul McLellan

Today, at CadenceLIVE Europe, we announced the Cadence Safety Solution, a new offering targeting safety-critical applications and featuring integrated analog and digital safety flows and engines for faster ISO 26262 and IEC 61508 certification. The s...
- 19 Oct 2021
PCB解析／ICパッケージ解析: The Systems Designer's Guide to...Systems Analysis (電子ブック)の紹介

SPB Japan

これは、I-Connect007から出版されたSystem Designer's Guide to ...TMシリーズの新しい本になります。この本はケイデンスのBrad Griffinによって書かれ、 System Analysis：Electromagnetic Interference and Thermal Analysis of Electronic Systems というタイトルが付けられています。ダウンロードする場合には、ここをクリックするか、本の画像をクリックしてください。...
- 18 Oct 2021
Computational Fluid Dynamics: CadenceCONNECT: Automated Meshing and Adaptive Remeshing at Bombardier

John Chawner

Pardon the brief post but I've been negligent in keeping you aware of a great example of how Cadence Pointwise Meshing can serve as a framework upon which an entire automated meshing system can be built. Bombardier's Dr. Amine Ben Haj Al...
- 18 Oct 2021
Computational Fluid Dynamics: Happy Exascale Day!

John Chawner

Did you that the 18th of October each year is celebrated as Exascale Day? October 18 = 10/18 = 10**18 = 1 quintillion = how many operations an exascale computer can do in a second. By way of comparison, the Milky Way Galaxy is one quintillion k...
- 18 Oct 2021
Breakfast Bytes: The Benefits of a Common Methodology for Emulation and Prototyping

Paul McLellan

Recently Cadence presented a webinar Benefits of A Common Methodology for Emulation And Prototyping. The two presenters were Michael Young, who is the product manager for the Palladium emulation product line, and Juergen Jaeger, who is the produ...
- 18 Oct 2021
Computational Fluid Dynamics: Cadence is Driving into the Future with Computational Fluid Dynamics

David Waltzman

For all 30+ years of our history, Cadence has created technologies to design and optimize the performance of electronics and the fabrication of the resulting integrated circuits, chip packages, and printed circuit boards. As a leader in the semicondu...
- 18 Oct 2021
PCB解析／ICパッケージ解析: System Analysis Knowledge Bytes: Layout Workbenchを使用したSI / PI / Thermal Integrity

SPB Japan

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています。このシリーズは、この分野での役立つ機能等に関する学識を提供することに加えて、システム解析に関連する知識と経験を共有するブロガーと専門家の意見を放送することを目的としています。今まで以上に、私たちのスマートフォンは、メールのチェック、オンラインショッピング、インターネットバンキング、ソーシャルネットワーキング、お...
- 17 Oct 2021
PCB設計／ICパッケージ設計: ASCENT: 17.4-2019 Hotfix 019以上に移行すべき理由とは

SPB Japan

"The only constant in life is change"(「人生で唯一不変なことは、変化だ」) ソフトウェアの世界ほど、この格言が真実味を帯びているところはないでしょう。アップデート、リリース、パッチ......これらは私たちの生活の一部となっています。それは、私たち全員が使用するもの、例えば携帯電話のアプリや日常生活で使用するメジャーなアプリを、専門家たちが舞台裏でコンスタントに改良・微調整しているからです。 Cade...
- 17 Oct 2021
Breakfast Bytes: Sunday Brunch Video for 17th October 2021

Paul McLellan

https://youtu.be/hzxc23WMLZk Made at Pebble Beach (camera Carey Guo) Monday: Jim Hogan's Celebration of Life Tuesday: Thermal Live, the Celsius Webinar Wednesday: Mission Critical 2021 Thursday: Dieter Rams Friday: Save the DATE: Design and Test ...
- 17 Oct 2021
PCB、IC封装：设计与仿真分析: 如何在IC封装设计中移除和替换设计区域

TeamAllegro

本文作者：Tyler Lockman，Cadence Software Architect，于加拿大卡尔顿大学获计算机科学学士学位后，在Cadence Allegro产品部门工作超过20年，专注于IC封装与中介层基板设计。同时，参与全Allegro平台、Virtuoso、PVS、OrbitIO及 Innovus产品的核心工作。 space 如果您曾经尝试过去除设计的某个区域，您可能会发现这个过程比想象的更加复杂。如果我们使用显示元素（show element）功能来选择该区域中的铺面，就会选中...
- 15 Oct 2021
Spotlight Taiwan: 回顧CadenceLIVE Taiwan 2021

candyyu

CadenceLIVE Taiwan 2021熱鬧非凡，活動當天即上千人湧入參與，無論是專題演講、技術分享以及技術論壇，場場人氣爆棚。感謝所有踴躍參與的朋友們，讓Cadence在半導體與電子設計與開發的路上，更向前邁出一大步!今年的CadenceLIVE Taiwan 2021專題演講由Cadence執行長陳立武(Lip-bu Tan)領銜，帶來『推動半導體產業的復興 (Fueling the Semiconductor Renaissance)』的專題演講。陳立武執行長認為5G 通訊、IoT、...
- 15 Oct 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

We will not let today's gray and wet weather in Fort Worth (home of Cadence's Pointwise team) put a damper on the week's CFD news which contains something from the highbrow to the sophomoric. Read about the state of the aerospace industr...
- 15 Oct 2021
Academic Network: Cadence Advanced Node GPDK v1.1 Released

Anton Klotz

Cadence has quite a long history of releasing Generic PDKs for demonstration purposes. All Rapid Adoption Kits (RAKs) are based on one of the GPDKs, which are downloadable from support.cadence.com. For academic users, GPDK has the pleasant side ...
- 15 Oct 2021
Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 10 Virtuoso Schematic Editor

Parula

This Blog shows how the Virtuoso Schematic Editor tool provides numerous capabilities to facilitate fast and easy design entry. The main key benefit of speeding the common design entry tasks by 5x. It also mentions about product family providing a flexible set of product performance levels, such as Virtuoso Schematic Editor L and Virtuoso Schematic Editor XL, to best suit your design flow needs.
- 15 Oct 2021
Breakfast Bytes: Save the DATE: Design and Test Europe 2022, Antwerp

Paul McLellan

Design and Test Europe, normally known as just DATE, is back to its usual March schedule for 2022. It will take place from 14th to 23rd March. The plans are for this to be a hybrid event, with the on-site portion taking place in Antwerp, a port city ...
- 15 Oct 2021

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