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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

Breakfast Bytes

Visa, Priceless

Well, okay. It's actually Mastercard that runs those "priceless" ads, not Visa. But…

• 10 min read
visa , h-1b

Breakfast Bytes

A New Era Needs a New Architecture: The Tensilica Vision Q6 DSP

There is a trend for increasing sophistication in vision and in artificial intelligence…

• 5 min read
DSP , android neural networks , linley processor conference , caffe , TensorFlow , Tensilica , vision , vision q6

Whiteboard Wednesdays

Whiteboard Wednesdays - New Tensilica Vision Q6 DSP for Vision and AI Processing

In this week’s Whiteboard Wednesdays video, Pulin Desai, discusses the features and…

• less than a min read
DSP , Whiteboard Wednesdays , vision processing , AI

Breakfast Bytes

What's For Breakfast? Video Preview April 16th to 20th 2018

https://youtu.be/R3fdD-xR9So Coming from CDNLive Silicon Valley (camera Sean)…

• less than a min read
ddr5 , CDNLive , AMI , CDNLive EMEA , algorithmic modeling interface , esd alliance

Breakfast Bytes

Virtuoso 2018, a Fine Vintage

In Post World-War II Blues, Al Stewart (who happened to go to the same high school…

• 4 min read
Virtuoso , Sigrity , 5nm , Allegro

Breakfast Bytes

6 Ways to Get the Most Out of CDNLive

It's CDNLive! Well, not today, Tuesday and Wednesday this week at the Santa Clara…

• 3 min read
CDNLive

Breakfast Bytes

Open the Pod Bay Doors, HAL

50 years ago today was the release of 2001: A Space Odyssey. The movie came about…

• 5 min read
kubrick , arthur c. clarke , 2001 a space odessey , 2001

Analog/Custom Design

Virtuoso Video Diary: Reusing Variables through CSV Export and Import

Do you have some specific variables in a test and wonder if you could have a way…

• 2 min read
Analog Design Environment , custom/analog , Explorer , Analog Simulation , analog , ADE , Virtuoso Analog Design Environment , Virtuoso , Virtuoso Video Diary , Custom IC Design , Assembler , ADE Assembler

Verification

Xcelium's New Save and Restart Saves You Time

You may have heard about the overhaul to the old save/restart mechanism that was…

• 2 min read
save and restart , xcelium , save and restore , checkpointing

Learning and Support

The Evolution of Cadence Help - I

Change, being a fact of life, is inevitable even for software systems. We have come…

• 1 min read
Self-Help , videos , Self Learning , what's new , Support , Cadence Help , Help resource , Cadence support

Breakfast Bytes

Semiconductor Specialization Versus Valuation

At SEMICON China, Wally Rhines gave one of the keynotes on the opening day. It was…

• 4 min read
Wally Rhines , Semiconductor , consolidation

Breakfast Bytes

What's For Breakfast? Video Preview April 9th to 13th 2018

https://youtu.be/xEgjpNWtC1I Coming from Santa Clara Convention Center Theater…

• less than a min read
CDNLive , linley group , h-1b , Tensilica , microprocessor

Breakfast Bytes

How Low Can You Go?

I slipped into an obscure bar in the no-man's-land between Santana Row and downtown…

• 6 min read
3nm , imec , 5nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Interfaces—If You’re Not First, You’re Last

In this week’s Whiteboard Wednesday video, Tom Hackett recounts two personal experiences…

• less than a min read
Whiteboard Wednesdays , IP , LPDDR , NVMe , USB , SoC Interface , Type-C

Verification

New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP

As discussed in the previous installments of the blog, the recent update of the AMBA…

• 3 min read
amba5 , Verification IP , ACE VIP , AXI VIP , AMBA

Breakfast Bytes

Deep Blue, AlphaGo, and AlphaZero

There are three major events in computers learning to play board games at a very…

• 6 min read
artificial intelligence , alphago , alphazero , go , deep blue , chess

Verification

NVMe Express 1.3: Addressing the Storage Needs of the Data Revolution from Enterprise…

The amount of data we are generating and consuming has exploded in recent years.…

• 2 min read
Verification IP , NVM Express , NVMe , IoT , VIP , cloud , big data , storage , PCIe , PCI Express , data centers

Breakfast Bytes

SEMICON China: Big, Really Big

When I was at embedded world in Nuremberg recently, I ran into Dick Selwood because…

• 9 min read
semicon , semicon china , 3D NAND , DRAM , 200mm

Verification

List of TLM Analysis Ports: Where Is This Packet Coming From?

Let’s say that you got an invitation from the police station nearest your home to…

• 4 min read
Specman , Functional Verification , e , e language , team specman , xcelium
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