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Featured

Corporate News

New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug

Verification engineers continually report that up to 70% of the total engineering…

Corporate
Corporate 9 Oct 2025 • 2 min read
news story , featured , verisium , AI

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
Corporate 8 Oct 2025 • 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink
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Blog - Post List

Latest blogs

Verification

'Verification Acceleration' vs. 'Simulation Acceleration'

Simulation acceleration and emulation technology has been commonly used to run faster…

Anonymous 11 Jul 2008 • 1 min read
Acceleration , System Design and Verification , Emulation , Verification Acceleration , Simulation acceleration

System, PCB, & Package Design 

Which SPB customers will be attending CDNLive! 2008 in San Jose?

While I've attended a few Cadence Corporate User Group events over the past years…

Jerry GenPart 11 Jul 2008 • 1 min read
SPB , Design Entry HDL , Front-end PCB design , PCB design

System, PCB, & Package Design 

Lack of design-chain collaboration prevents SiP to go mainstream

A few years back, I was considering that the lack of an integrated design solution…

archive 11 Jul 2008 • 1 min read
backend implementation , IDMs , IC Packaging & SiP design , PDK , design chain

RF Engineering

Cadence, the new kid on the Electromagnetic Solver Block

On June 16 2008, Cadence introduced a new Electromagnetic (EM) solver technology…

Kabir 11 Jul 2008 • less than a min read
RF designer , Electromagnetic (EM) , RF design , wireless integrated circuit verification

Verification

ESL handoff: closer than you think

Take a look at the article linked below, titled: "ESL handoff: closer than you think…

Ran Avinun 10 Jul 2008 • less than a min read
System Design and Verification , ESL handoff

Verification

Dreaming in Code

One of the best books I read this year is called Dreaming in Code by Scott Rosenberg…

jasona 10 Jul 2008 • 2 min read
Dreaming in Code , System Design and Verification , Chandler project

Verification

Do you want to buy my chip?

Once upon a time semiconductor companies produced a chip, made a data sheet, showed…

jasona 12 Jun 2008 • 1 min read
System Design and Verification , Hardware/software co-verification
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